SLA24C164-D/P(1999) 查看數據表（PDF） - Infineon Technologies

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SLA24C164-D/P
(Rev.:1999)

16 Kbit (2048 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus and Page Protection Mode™

Infineon Technologies 

SLx 24C164/P

The timing conventions for read and write operations are described in figures 5 and 6.

Command Byte (CSW)

Data Transfer to EEPROM

SCL

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SDA

1 c2 c1 c0 A10 A9 A8 0

A7 A6 A5 A4 A3 A2 A1 A0 ACK

START from Master

Acknowledge from EEPROM

Figure 5

Timing of the Command Byte CSW

Acknowledge from EEPROM

IED02184

Command Byte (CSR)

Data Transfer from EEPROM

SCL

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SDA

1 c2 c1 c0 X X X 1 ACK

START from Master

Acknowledge from EEPROM

Figure 6

Timing of the Command Byte CSR

ACK

Acknowledge from Master

IED02275

Semiconductor Group

10

1998-07-27

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