LT3791-1 查看數據表（PDF） - Linear Technology
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LT3791-1 Datasheet PDF : 26 Pages
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LT3791-1
Pin Functions
CTRL (Pin 1): Output Current Sense Threshold Adjustment
Pin. Regulating threshold V(ISP-ISN) is 1/10th of (VCTRL –
200mV). CTRL linear range is from 200mV to 1.1V. For
VCTRL > 1.3V, the current sense threshold is constant at
the full-scale value of 100mV. For 1.1V < VCTRL < 1.3V, the
dependence of the current sense threshold upon VCTRL tran-
sitions from a linear function to a constant value, reaching
98% of full scale by VCTRL = 1.2V. Connect CTRL to VREF
for the 100mV default threshold. Force less than 175mV
(typical) to stop switching. Do not leave this pin open.
SS (Pin 2): Soft-start reduces the input power sources
surge current by gradually increasing the controller’s cur-
rent limit. A minimum value of 22nF is recommended on
this pin. A 100k resistor must be placed between SS and
VREF for the LT3791-1.
PWM (Pin 3): A signal low turns off switches, idles switch-
ing and disconnects the VC pin from all external loads. The
PWMOUT pin follows the PWM pin. PWM has an internal
90k pull-down resistor. If not used, connect to INTVCC.
C/10 (Pin 4): C/10 Charge Termination Pin. An open-drain
pull-down on C/10 asserts if FB is greater than 1.15V (typi-
cal) and V(ISP-ISN) is less than 10mV (typical). To function,
the pin requires an external pull-up resistor.
SHORT (Pin 5): Output Shorted Pin. An open-drain pull-
down on SHORT asserts if FB is less than 400mV (typical).
To function, the pin requires an external pull-up resistor.
VREF (Pin 6): Voltage Reference Output Pin, Typically 2V.
This pin drives a resistor divider for the CTRL pin, either
for output current adjustment or for temperature limit/
compensation of the output load. Can supply up to 200µA
of current.
ISMON (Pin 7): Monitor pin that produces a voltage that
is ten times the voltage V(ISP-ISN). ISMON will equal 1V
when V(ISP-ISN) = 100mV.
IVINMON (Pin 8): Monitor pin that produces a voltage
that is twenty times the voltage V(IVINP-IVINN). IVINMON
will equal 1V when V(IVINP-IVINN) = 50mV.
EN/UVLO (Pin 9): Enable Control Pin. Forcing an accurate
1.2V falling threshold with an externally programmable
hysteresis is generated by the external resistor divider
and a 3µA pull-down current. Above the 1.2V (typical)
threshold (but below 6V), EN/UVLO input bias current is
sub-µA. Below the falling threshold, a 3µA pull-down cur-
rent is enabled so the user can define the hysteresis with
the external resistor selection. An undervoltage condition
resets soft-start. Tie to 0.3V, or less, to disable the device
and reduce VIN quiescent current below 1µA.
IVINP (Pin 10): Positive Input for the Input Current Limit
and Monitor. Input bias current for this pin is typically 90µA.
IVINN (Pin 11): Negative Input for the Input Current Limit
and Monitor. The input bias current for this pin is typically
20µA.
VIN (Pin 12): Main Input Supply. Bypass this pin to PGND
with a capacitor.
INTVCC (Pin 13): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. Bypass
this pin to PGND with a minimum 4.7µF ceramic capacitor.
TG1 (Pin 14): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage equal to INTVCC superimposed on
the switch node voltage SW1.
BST1 (Pin 15): Bootstrapped Driver Supply. The BST1 pin
swings from a diode voltage below INTVCC up to a diode
voltage below VIN + INTVCC.
SW1 (Pin 16): Switch Node. SW1 pin swings from a diode
voltage drop below ground up to VIN.
PGND (Pins 17, 20): Power Ground. Connect these pins
closely to the source of the bottom N-channel MOSFET.
BG1 (Pin 18): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
BG2 (Pin 19): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
SW2 (Pin 21): Switch Node. SW2 pin swings from a diode
voltage drop below ground up to VOUT.
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