A3V56S30ETP 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
A3V56S30ETP Datasheet PDF : 40 Pages
| |||
A3V56S30ETP
A3V56S40ETP
256M Single Data Rate Synchronous DRAM
Note:This figure shows the A3V56S30ETP
The A3V56S40ETP configuration is 8192x512x16 of cell array and DQ0-15
Type Designation Code
A 3Ｖ 56 Ｓ４０E ＴＰ－G6
Speed Grade
G： Green
75： 133MHz@CL=3
7： 143MHz@CL=3
6： 166MHz@CL=3
Package Type TP：TSOP (II)
Process Generation
Function Reserved for Future Use
Organization 2n 3：x8, 4：x16
SDR Synchronous DRAM
Density 56：256M bits
Interface V：LVTTL
Memory Style (DRAM)
Zentel DRAM
Revision 2.2
Page 3/39
Mar., 2009
Share Link: 