FM1608B(2013) 查看數據表（PDF） - Cypress Semiconductor
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FM1608B Datasheet PDF : 14 Pages
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FM1608B – 64Kb Bytewide 5V F-RAM
Write Cycle Timing - /WE Controlled Timing
CE
A(12:0)
WE
tAH
tAS
tWS
tWC
tCA
tC W
tWP
OE
DQ(7:0)
out
DQ(7:0)
in
tWZ
tDS
Power Cycle Timing
VDD
CE
VDD (min)
t PD
t PC
VIH (min)
VIH (min)
tPC
tWH
tWX
tDH
VDD (min)
t PU
VIL (max)
Power Cycle Timing (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Max Units
tPU
VDD(min) to First Access Start
tPD
Last Access Complete to VDD(min)
10
-
ms
0
-
s
tVR
VDD Rise Time
30
-
s/V
tVF
VDD Fall Time
30
-
s/V
Notes
1 Slope measured at any point on VDD waveform.
Notes
1
1
Document Number: 001-86211 Rev. *A
Page 9 of 14
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