SM6451BV 查看數據表（PDF） - Nippon Precision Circuits
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SM6451BV Datasheet PDF : 12 Pages
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BLOCK DIAGRAM
SM6451BV
DVDD DVSS
LIN
MLEN
MCK
MDT
RSTN
ADRS1
ADRS2
RIN
Attenuation
Control
1/2VDD
LOUT
VRL
Attenuation
Control
1/2VDD
VRR
ROUT
AVDD AVSS
PIN DESCRIPTION
Number
Name
I/O1
1
RSTN
Ip
2
ADRS1
Ip
3
ADRS2
Ip
4
DVDD
–
5
LOUT
O
6
LIN
I
7
AVDD
–
8
VRL
O
9
VRR
O
10
AVSS
–
11
RIN
I
12
ROUT
O
13
DVSS
–
14
MLEN
Ip
15
MCK
Ip
16
MDT
Ip
1. Ip = input pin with pull-up, A = analog, D= digital
A/D1
Description
D
System reset input (LOW -level reset)
D
Chip address set 1
D
Chip address set 2
D
Digital supply
A
Left-channel audio output
A
Left-channel audio input
A
Analog supply
A
Left-channel reference voltage (0.5VD D ). Connect a 10 µF capacitor
between VRL and AVSS.
A
Right-channel reference voltage (0.5VD D ). Connect a 10 µF capacitor
between VRR and AVSS.
A
Analog ground
A
Right-channel audio input
A
Right-channel audio output
D
Digital ground
D
Microcontroller latch enable input
D
Microcontroller clock input
D
Microcontroller data input
NIPPON PRECISION CIRCUITS—2
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