BUK552-60 查看數據表（PDF） - Philips Electronics
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BUK552-60 Datasheet PDF : 7 Pages
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Philips Semiconductors
PowerMOS transistor
Logic level FET
120 PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/PD 25 ˚C = f(Tmb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V
100 ID / A
BUK552-60
A
B
tp = 10 us
10
100 us
DC
1 ms
10 ms
100 ms
1
1
10
100
VDS / V
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Product Specification
BUK552-60A/B
Zth j-mb / (K/W)
1E+01
BUKX52
1E+00 0.5
0.2
0.1
0.05
1E-01 0.02
0
1E-02
1E-07 1E-05
PD
tp
D
=
tp
T
1E-03
t/s
T
t
1E-01 1E+01
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
ID / A
28
10
7
24
BUK552-60A
6
20
5
16
12
VGS / V =
4
8
3
4
0
0
2
4
6
8
10
VDS / V
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS); parameter VGS
RDS(ON) / Ohm
0.5
3 3.5 4
0.4
0.3
4.5 5
BUK552-60A
VGS / V =
5.5
6
7
0.2
10
0.1
0
0
Fig.6.
10
20
30
40
ID / A
Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID); parameter VGS
April 1993
3
Rev 1.100
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