DAC08RC/883C 查看數據表（PDF） - Analog Devices

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DAC08RC/883C

8-Bit, High Speed, Multiplying D/A Converter

Analog Devices 

DAC08

Data Sheet

VREF

10V

39kΩ

10kΩ

POT

LOW T.C.

4.5kΩ

14

IREF (+) ≈ 2mA

≈1V

15

APPROX

5kΩ

Figure 27. Recommended Full-Scale Adjustment Circuit

RREF

14

IO

4

R15

–VREF

15

IO

2

IFS ≈

–VREF

RREF

NOTE

RREF SETS IFS; R15 IS FOR

BIAS CURRENT CANCELLATION.

15V

2

10V

VO

6

REF01* 5

Figure 28. Basic Negative Reference Operation

10kΩ

MSB

LSB

B1 B2 B3 B4 B5 B6 B7 B8

5.0kΩ

+15V

5.000kΩ

IO

4

5.0kΩ

2

V+ –V CC VLC IO

AD8671

B1 B2 B3 B4 B5 B6 B7 B8 EO

POS. FULL RANGE

EO ZERO SCALE

1 1 1 1 1 1 1 1 +4.960

1 0 0 0 0 0 0 0 0.000

NEG. FULL SCALE +1LSB 0 0 0 0 0 0 0 1 –4.960

NEG. FULL SCALE

0 0 0 0 0 0 0 0 –5.000

4

*OR ADR01

+15V –15V

–15V

Figure 29. Offset Binary Operation

RL

4

IO

2

IO

AD8671

EO

0 TO –IFR × RL

255

IFR = 256 IREF

FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC).

CONNECT INVERTING INPUT OF OP AMP TO IO (PIN 2): CONNECT IO (PIN 4)

TO GROUND.

Figure 30. Positive Low Impedance Output Operation

IO

4

AD8671

EO

2

IO

RL

0 TO –IFR × RL

255

IFR = 256 IREF

FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC).

CONNECT NONINVERTING INPUT OF OP AMP TO IO (PIN 2): CONNECT IO (PIN 4)

TO GROUND.

Figure 31. Negative Low Impedance Output Operation

Rev. D | Page 12 of 21

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