HC5513 查看數據表（PDF） - Renesas Electronics

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HC5513

TR909 DLC/FLC SLIC with Low Power Standby

Renesas Electronics 

HC5513

ITIP TIP

RING

IRING

+-

ITIP

IRING

-

+

HC5513

LOOP CURRENT

CIRCUIT

IRSN

SATURATION GUARD

CIRCUIT

A1

I1

-5V

A2

I2

-5V

-

+

R1-

+

VTX

RSN

RDC

-2.5V

RRX

RDC1

RDC2

CDC

RSG

RSG

-5V

FIGURE 13. DC LOOP CURRENT

Circuit Operation and Design Information

The HC5513 is a current feed voltage sense Subscriber Line

Interface Circuit (SLIC). This means that for short loop

applications the SLIC provides a programed constant current to

the tip and ring terminals while sensing the tip to ring voltage.

The following discussion separates the SLIC’s operation into

its DC and AC path, then follows up with additional circuit and

design information.

Constant Loop Current (DC) Path

SLIC in the Active Mode

The DC path establishes a constant loop current that flows out

of tip and into the ring terminal. The loop current is

programmed by resistors RDC1, RDC2 and the voltage on the

RDC pin (Figure 13). The RDC voltage is determined by the

voltage across R1 in the saturation guard circuit. Under

constant current feed conditions, the voltage drop across R1

sets the RDC voltage to -2.5V. This occurs when current flows

through R1 into the current source I2. The RDC voltage

establishes a current (IRSN) that is equal to VRDC/(RDC1

+RDC2). This current is then multiplied by 1000, in the loop

current circuit, to become the tip and ring loop currents.

For the purpose of the following discussion, the saturation

guard voltage is defined as the maximum tip to ring voltage at

which the SLIC can provide a constant current for a given

battery and overhead voltage.

For loop resistances that result in a tip to ring voltage less than the

saturation guard voltage the loop current is defined as:

IL = R-----D----C----21----.-+5----V-R----D-----C----2-  1000

(EQ. 1)

where: IL = Constant loop current.

RDC1 and RDC2 = Loop current programming resistors.

FN3963 Rev.12.00

August 2003

Capacitor CDC between RDC1 and RDC2 removes the VF

signals from the battery feed control loop. The value of CDC is

determined by Equation 2:

CDC

=

T







-------1--------

RDC1

+

-R----D--1--C----2--

(EQ. 2)

where T = 30ms.

NOTE: The minimum CDC value is obtained if RDC1 = RDC2.

Figure 14 illustrates the relationship between the tip to ring

voltage and the loop resistance. For a 0 loop resistance both

tip and ring are at VBAT/2. As the loop resistance increases, so

does the voltage differential between tip and ring. When this

differential voltage becomes equal to the saturation guard

voltage, the operation of the SLIC’s loop feed changes from a

constant current feed to a resistive feed. The loop current in the

resistive feed region is no longer constant but varies as a

function of the loop resistance.

VBAT = -48V, IL = 23mA, RSG = 21.4k

0

SATURATION

VTIP

GUARD VOLTAGE

-10

CONSTANT CURRENT

FEED REGION

-20

RESISTIVE FEED

REGION

-30

-40

-50

0

SATURATION

GUARD VOLTAGE

1.2K

LOOP RESISTANCE ()

FIGURE 14. VTR vs RL

VRING



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