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IDT7207(1996) 查看數據表(PDF) - Integrated Device Technology

零件编号
产品描述 (功能)
生产厂家
IDT7207
(Rev.:1996)
IDT
Integrated Device Technology IDT
IDT7207 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT7207 CMOS ASYNCHRONOUS FIFO
32,768 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)
Com'l Com'l & Mil. Com'l Military Com'l Com'l & Mil.
7207L15 7207L20 7207L25 7207L30 7207L35 7207L50
Symbol Parameters
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
fS
Shift Frequency
— 40 — 33.3 — 28.5 — 25 — 22.2 — 15 MHz
tRC
Read Cycle Time
25 — 30 — 35 — 40 — 45 — 65 — ns
tA
Access Time
— 15 — 20 — 25 — 30 — 35 — 50 ns
tRR
Read Recovery Time
10 — 10 — 10 — 10 — 10 — 15 — ns
tRPW
Read Pulse Width(2)
15 — 20 — 25 — 30 — 35 — 50 — ns
tRLZ
Read LOW to Data Bus LOW(3)
5 — 5 — 5 — 5 — 5 — 10 — ns
tWLZ
Write HIGH to Data Bus Low-Z(3, 4) 5
— 5 — 5 — 5 — 10 — 15 — ns
tDV
Data Valid from Read HIGH
5 — 5 — 5 — 5 — 5 — 5 — ns
tRHZ
Read HIGH to Data Bus High-Z(3) — 15 — 15 — 18 — 20 — 20 — 30 ns
tWC
Write Cycle Time
25 — 30 — 35 — 40 — 45 — 65 — ns
tWPW
Write Pulse Width(2)
15 — 20 — 25 — 30 — 35 — 50 — ns
tWR
Write Recovery Time
10 — 10 — 10 — 10 — 10 — 15 — ns
tDS
Data Set-up Time
11 — 12 — 15 — 18 — 18 — 30 — ns
tDH
Data Hold Time
0 — 0 — 0 — 0 — 0 — 5 — ns
tRSC
Reset Cycle Time
25 — 30 — 35 — 40 — 45 — 65 — ns
tRS
Reset Pulse Width(2)
15 — 20 — 25 — 30 — 35 — 50 — ns
tRSS
Reset Set-up Time(3)
15 — 20 — 25 — 30 — 35 — 50 — ns
tRTR
Reset Recovery Time
10 — 10 — 10 — 10 — 10 — 15 — ns
tRTC
Retransmit Cycle Time
25 — 30 — 35 — 40 — 45 — 65 — ns
tRT
Retransmit Pulse Width(2)
15 — 20 — 25 — 30 — 35 — 50 — ns
tRTS
Retransmit Set-up Time(3)
15 — 20 — 25 — 30 — 35 — 50 — ns
tRSR
Retransmit Recovery Time
10 — 10 — 10 — 10 — 10 — 15 — ns
tEFL
Reset to EF LOW
— 25 — 30 — 35 — 40 — 45 — 65 ns
tHFH, tFFH Reset to HF and FF HIGH
— 25 — 30 — 35 — 40 — 45 — 65 ns
tRTF
Retransmit LOW to Flags Valid — 25 — 30 — 35 — 40 — 45 — 65 ns
tREF
Read LOW to EF LOW
— 15 — 20 — 25 — 30 — 30 — 45 ns
tRFF
Read HIGH to FF HIGH
— 15 — 20 — 25 — 30 — 30 — 45 ns
tRPE
Read Pulse Width after EF HIGH 15 — 20 — 25 — 30 — 35 — 50 — ns
tWEF
Write HIGH to EF HIGH
— 15 — 20 — 25 — 30 — 30 — 45 ns
tWFF
Write LOW to FF LOW
— 15 — 20 — 25 — 30 — 30 — 45 ns
tWHF
Write LOW to HF Flag LOW
— 25 — 30 — 35 — 40 — 45 — 65 ns
tRHF
Read HIGH to HF Flag HIGH
— 25 — 30 — 35 — 40 — 45 — 65 ns
tWPF
Write Pulse Width after FF HIGH 15 — 20 — 25 — 30 — 35 — 50 — ns
tXOL
Read/Write LOW to XO LOW
— 15 — 20 — 25 — 30 — 35 — 50 ns
tXOH
Read/Write HIGH to XO HIGH
— 15 — 20 — 25 — 30 — 35 — 50 ns
tXI
XI Pulse Width(2)
15 — 20 — 25 — 30 — 35 — 50 — ns
tXIR
XI Recovery Time
10 — 10 — 10 — 10 — 10 — 10 — ns
tXIS
XI Set-up Time
10 — 10 — 10 — 10 — 15 — 15 — ns
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Pulse widths less than minimum are not allowed.
3. Values guaranteed by design, not currently tested.
4. Only applies to read data flow-through mode.
3140 tbl 05
5.05
3

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