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UPD70320GJ-8-5BG 查看數據表(PDF) - NEC => Renesas Technology

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UPD70320GJ-8-5BG
NEC
NEC => Renesas Technology NEC
UPD70320GJ-8-5BG Datasheet PDF : 74 Pages
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µPD70320
1.2 Non-port Pins
Pin Name
TxD0
TxD1
RxD0
RxD1
CTS0
CTS1
REFRQ
VTH
RESET
EA
X1
X2
D0 to D7
A0 to A19
MREQ
MSTB
R/ W
IOSTB
VDD
GND
IC
Input/Output
Output
Serial data output
Function
Input
Serial data input
Input & output
Input
Output
Input
Input
Input & output
Output
CTS input in asynchronous mode, receive clock input/output in I/O interface mode
CTS input
DRAM refresh pulse output
Comparator reference voltage input
Reset signal input
External memory access (connect to GND via a resistor (3 to 10 k))
Used to connect crystal resonator/ceramic resonator for oscillating system clock.
External clock is entered by entering reverse phase clock to both X1 and X2 pins.
8-bit data bus
20-bit address output
Output used to indicate that memory bus cycle has been started
Memory read/memory write strobe output
Read cycle/write cycle ID signal output
I/O read/I/O write strobe output
Positive power supply pins (all pins should be connected)
GND pins (all pins should be connected)
Internally connected (connect individually to VDD via a resistor (3 to 10 k))
8

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