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MB90350 查看數據表(PDF) - Cypress Semiconductor

零件编号
产品描述 (功能)
生产厂家
MB90350
Cypress
Cypress Semiconductor Cypress
MB90350 Datasheet PDF : 83 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MB90350 Series
Sub clock pin (X0A, X1A)
Yes (using the external oscillation) : devices without S-suffix
No (using the sub clock mode at internal CR oscillation) :
devices with S-suffix
Timer
Timebase timer, watch timer, watchdog timer: 1 channel
8/16-bit PPG timer: 8-bit × 10 channels or 16-bit × 6 channels
16-bit reload timer: 4 channels
16- bit input/output timer
16-bit freerun timer : 2 channels (FRT0: ICU0/1, FRT1: ICU
4/5/6/7, OCU 4/5/6/7)
16- bit input capture: (ICU): 6 channels
16-bit output compare: (OCU): 4 channels
FULL-CAN interface 1 channel
Compliant with Ver2.0 part A and Ver2.0 part B CAN specifica-
tions
Flexible message buffering (mailbox and FIFO buffering can
be mixed)
CAN wake-up function
UART (LIN/SCI): 2 channels
Equipped with full-duplex double buffer
Clock-asynchronous or clock-synchronous serial transmission
is available.
I2C interface: 1 channel
Up to 400 Kbit/s transfer rate
DTP/External interrupt: 8 channels, CAN wakeup: 1
channel
Module for activation of extended intelligent I/O service
(EI2OS), DMA, and generation of external interrupt by external
input.
Delay interrupt generator module
Generates interrupt request for task switching.
8/10-bit A/D converter: 15 channels
Resolution is selectable between 8-bit and 10-bit.
Activation by external trigger input is allowed.
Conversion time: 3 μs (at 24-MHz machine clock, including
sampling time)
Program patch function
Address matching detection for 6 address pointers.
Capable of changing input voltage level for port
Automotive/CMOS-Schmitt (initial level is Automotive in single
chip mode)
TTL level (corresponds to external bus pins only, initial level of
these pins is TTL in external bus mode)
Low voltage/CPU operation detection reset (devices
with T-suffix)
Detects low voltage (4.0 V 0.3 V) and resets automatically
Resets automatically when program is runaway and counter is
not cleared within interval time (approx. 262 ms : external 4
MHz)
Dual operation flash memory (only flash memory
devices with A-suffix)
Erase/write and read can be executed in the different bank
(Upper Bank/Lower Bank) at the same time.
Models that support 125 °C
Devices without A-suffix (excluding evaluation device)
: The maximum operating frequency is 16 MHz
(at TA  125 °C) .
Devices with A-suffix (excluding evaluation device)
: The maximum operating frequency is 24 MHz
(at TA  125 °C) .
Flash security function
Protects the content of Flash memory (MB90F352x and
MB90F357x only)
External bus interface
4 Mbytes external memory space
Document Number: 002-07872 Rev. *A
Page 2 of 83

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