MB90352 查看數據表（PDF） - Cypress Semiconductor

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MB90352

F2MC-16LX 16-bit Microcontroller

Cypress Semiconductor 

MB90350 Series

3. Product Lineup 3

Part Number

Parameter

CPU

MB90F356A,

MB90F357A

MB90F356TA,

MB90F357TA

MB90F356AS,

MB90F357AS

F2MC-16LX CPU

MB90F356TAS,

MB90F357TAS

System clock

On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)

Minimum instruction execution time : 42 ns (oscillation clock 4 MHz, PLL × 6)

ROM

Dual operation flash memory

64Kbytes :MB90F356A(S), MB90F356TA(S)

128Kbytes :MB90F357A(S), MB90F357TA(S)

RAM

4 Kbytes

Emulator-specific power

supply*

—

Sub clock pin

(X0A, X1A)

No

Yes

(internal CR oscillation can be used as

sub clock)

Clock monitor

function

Yes

Low voltage/CPU

operation detection

No

Yes

No

Yes

reset

Operating

voltage range

3.5 V to 5.5 V : at normal operating (not using A/D converter)

3.5 V to 5.5 V : at using A/D converter/Flash programming

3.5 V to 5.5 V : at using external bus

Operating

temperature range

40 °C to 125 °C

Package

LQFP-64

2 channels

UART

I2C (400 Kbps)

Wide range of baud rate settings using a dedicated reload timer

Special synchronous options for adapting to different synchronous serial protocols

LIN functionality working either as master or slave LIN device

1 channel

A/D Converter

16-bit Reload Timer

(4 channels)

15 channels

10-bit or 8-bit resolution

Conversion time : Min 3 s includes sample time (per one channel)

Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys  Machine clock frequency)

Supports External Event Count function.

16-bit I/O Timer

(2 channels)

I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1.

I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7.

Signals an interrupt when overflowing.

Supports Timer Clear when a match with Output Compare (Channel 0, 4) .

Operation clock frequency : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27

(fsys  Machine clock frequency)

16-bit Output

Compare

4 channels

Signals an interrupt when 16-bit I/O Timer matches with output compare registers.

A pair of compare registers can be used to generate an output signal.

16-bit Input Capture

6 channels

Retains freerun timer value by (rising edge, falling edge or rising & falling edge), signals an interrupt.

(Continued)

Document Number: 002-07872 Rev. *A

Page 8 of 83

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