CXP81800 查看數據表（PDF） - Sony Semiconductor
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CXP81800 Datasheet PDF : 8 Pages
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Pin Configuration in Piggyback Mode (QFP package)
CXP81800
PB5/PPO13
PB4/PPO12
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0/PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
4 3 2 1 32 31 30
11
A6
5
29
A8
70
12
A5
6
69
28
A9
13
A4
7
68
27
A11
14
A3
8
67
26
NC
15
A2
9
66
25
OE
16
A1
10
65
24
A10
17
A0
11
23
CE
64
18
NC
12
63
22
D7
19
D0
13
62
21
D6
20
14 15 16 17 18 19 20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PI6/SO1
PI7/SI1
PE0/INT0
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0
PG1
PG2
PG3
PG4
PG5
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AVDD
AVREF
AVss
PF4/AN8
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
–2–
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