IDT74FCT162601AT 查看數據表（PDF） - Integrated Device Technology
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IDT74FCT162601AT
Integrated Device Technology
IDT74FCT162601AT Datasheet PDF : 7 Pages
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IDT74FCT16601AT/CT/ET, 162601AT/CT/ET
FAST CMOS 18-BIT UNIVERSAL BUS TRANSCEIVERS
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
OEAB
1
56
LEAB
2
55
A1
3
54
GND
4
53
A2
5
52
A3
6
51
VCC
7
50
A4
8
49
A5
9
48
A6
10
47
GND
11
46
CLKENAB
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
VTERM(2) Terminal Voltage with Respect to
GND
VTERM(3) Terminal Voltage with Respect to
GND
TSTG Storage Temperature
Max.
–0.5 to +7.0
–0.5 to
VCC +0.5
–65 to +150
Unit
V
V
°C
IOUT DC Output Current
–60 to +120 mA
NOTES:
3247 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
A7
12
45
B7
A8
A9
A10
A11
A12
GND
A13
13
44
14 SO56-1 43
SO56-2
15 SO56-3 42
16
41
17
40
18
39
19
38
B8
B9
B10
B11
B12
GND
B13
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1)
CIN
Input
Capacitance
Conditions Typ. Max. Unit
VIN = 0V
3.5 6.0 pF
CI/O
I/O
VOUT = 0V 3.5 8.0 pF
Capacitance
NOTE:
3247 lnk 04
1. This parameter is measured at characterization but not tested.
A14
20
37
B14
A15
21
36
B15
VCC
22
A16
23
35
VCC
34
B16
FUNCTION TABLE(1,4)
A17
24
GND
25
A18
26
OEBA
27
LEBA
28
33
B17
32
GND
31
B18
30
CLKBA
29
CLKENBA
SSOP/
TSSOP/TVSOP
TOP VIEW
PIN DESCRIPTION
3247 drw 02
Pin Names
OEAB
OEBA
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
B-to-A Clock Input
Ax
A-to-B Data Inputs or B-to-A 3-State Outputs
Bx
CLKENAB
CLKENBA
B-to-A Data Inputs or A-to-B 3-State Outputs
A to B Clock Enable Input
B to A Clock Enable Input
3247 tbl 01
Inputs
CLKENAB OEAB LEAB CLKAB
Outputs
A
B
X
H
X
X
X
Z
X
L
H
X
L
L
X
L
H
X
H
H
H
L
L
X
X
B0(2)
L
L
L
↑
L
L
L
L
L
↑
H
H
L
L
L
L
X
B0(2)
L
L
L
H
X
B0(3)
NOTES:
3247 tbl 02
1. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA,
LEBA and CLKBA.
2. Output level before the indicated steady-state input conditions were
established.
3. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
↑ = LOW-to-HIGH Transition
5.9
2
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