CXP83120A 查看數據表（PDF） - Sony Semiconductor
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CXP83120A Datasheet PDF : 24 Pages
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CXP83120A/83124A
Symbol
I/O
PD0/SEG16
to
PD7/SEG23
Output/Output
PF0/SEG24
to
PF7/SEG31
Output/Output
PG0/SEG32
to
PG7/SEG39
Output/Output
SEG0 to SEG15 Output
COM0 to COM3 Output
VLC1 to VLC3
VL
Output
EXTAL1
Input
XTAL1
Functions
(Port D)
8-bit output port.
(8 pins)
(Port F)
8-bit output port.
(8 pins)
LCD segment signal output.
(port G)
8-bit output port.
(8 pins)
LCD segment signal output.
LCD common signal output.
LCD bias power supply.
Control pin to cut off the current flowing to external LCD bias resistor
during standby.
Crystal connectors for system clock oscillation. When the clock is supplied
externally, input to EXTAL1; opposite phase clock should be input to XTAL1.
System clock oscillation of EXTAL1 and XTAL1 is used for normal operation
mode (Max. 10MHz).
EXTAL2
XTAL2
TEX
TX
RST
NC
AVREF
AVSS
VDD
VSS
Input
Input
Output
Input
Input
Crystal connectors for system clock oscillation. When the clock is supplied
externally, input to EXTAL2; opposite phase clock should be input to XTAL2.
System clock oscillation of EXTAL2 and XTAL2 is used for sub clock mode
(Typ. 500kHz).
Crystal connectors for 32kHz timer/counter clock generation circuit.
Connect a 32.768kHz crystal oscillator between TEX and TX. For usage
as event input, connect clock oscillation source to TEX, and leave TX
open.
Low-level active system reset.
NC. Under normal operating conditions, connect to VDD.
Reference voltage input for A/D converter.
A/D converter GND.
Positive power supply.
GND. Two VSS are connected to GND.
–6–
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