CXP83120A 查看數據表（PDF） - Sony Semiconductor

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CXP83120A

CMOS 8-bit Single Chip Microcomputer

Sony Semiconductor 

CXP83120A/83124A

P in

PE5/PWM

1 pin

PE6/TO/ADJ

1 pin

PH0 to PH7

8 pins

Port E

Circuit format

PWM

Port E output selection

"0" when reset

Reset E data

Data bus

"1" when reset

RD (Port E)

When reset

High level

Port E

Port E data

"1" when reset

TO

∗2 ADJ16K

ADJ2K

Port E output selection

Port E output selection

"00" when reset

TO Output enable

∗1

Internal reset signal

MPX

∗1 Pull-up transistors approx. 150kΩ.

∗2 ADJ signals are frequency divider outputs

for 32kHz oscillation frequency adjustment.

ADJ2K provides usage as buzzer output.

High level

(High level

with 150kΩ

resistor when

reset)

Port H

∗

Pull-up resistor

"0" when reset

Port H data

Data bus

Port H direction

"0" when reset

RD (Port H)

IP

∗ Pull-up transistors approx. 100kΩ

Hi-Z

–9–

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