TEST CIRCUITS
Load Circuit for tdDO, tr, tf, tdis and ten
TEST POINT
DOUT
3k
20pF
VCC tdis WAVEFORM 2, ten
tdis WAVEFORM 1
1197/99 TC01
LTC1197/LTC1197L
LTC1199/LTC1199L
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
DOUT
tr
VOH
VOL
tf
1197/99 TC04
Voltage Waveforms for DOUT Delay Time, tdDO
CLK
DOUT
VIH
tdDO
thDO
VOH
VOL
1197/99 TC02
Voltage Waveforms for tdis
CS
VIH
DOUT
WAVEFORM 1
(SEE NOTE 1)
90%
tdis
DOUT
WAVEFORM 2
(SEE NOTE 2)
10%
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL
1197/99 TC05
LTC1197/LTC1197L ten Voltage Waveforms
CS
CLK
DOUT
1
2
3
4
ten
1197/99 TC03
LTC1199/LTC1199L ten Voltage Waveforms
CS
DIN
CLK
DOUT
START
1
2
3
4
5
6
ten
1197/99 TC06
11