TDA8034T(2010) 查看數據表（PDF） - NXP Semiconductors.

零件编号

产品描述 (功能)

生产厂家

TDA8034T
(Rev.:2010)

Smart card interface

NXP Semiconductors. 

NXP Semiconductors

TDA8034T; TDA8034AT

Smart card interface

8.5 Shutdown mode

After a power-on reset, if pin CMDVCCN is HIGH, the circuit enters the Shutdown mode,

ensuring only the minimum number of circuits are active while the TDA8034T/TDA8034AT

waits for the microcontroller to start a session.

• all card contacts are inactive. The impedance between the contacts and GND is

approximately 200 Ω.

• pin I/OUC is high-impedance using the 11 kΩ pull-up resistor connected to VDD(INTF)

• the voltage generators are stopped

• the voltage supervisor is active

• the internal oscillator runs at its lowest frequency (fosc(int)low)

8.6 Activation sequence

The following device activation sequence is applied when using an external clock; see

Figure 6:

1. Pin CMDVCCN is pulled LOW (t0).

2. The internal oscillator is triggered (t0).

3. The internal oscillator changes to high frequency (t1).

4. VCC rises from either 0 V to 3 V or 0 V to 5 V on a controlled slope (t2).

5. Pin I/O is driven HIGH (t3).

6. The clock on pin CLK is applied to the C3 contact (t4).

7. Pin RST is enabled (t5).

Calculation of the time delays is as follows:

• t1 = t0 + 384 × 1∨fosc(int)low

• t2 = t1

• t3 = t1 + 17T / 2

• t4 = driven by host controller; > t3 and < t5

• t5 = t1 + 23T / 2

Remark: The value of period T is 64 times the period interval of the internal oscillator at

high frequency (1∨fosc(int)high); t3 is called td(start) and t5 is called td(end).

TDA8034T_TDA8034AT

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2.0. — 12 November 2010

© NXP B.V. 2010. All rights reserved.

8 of 29

Share Link: