VG26S17405J-6 查看數據表（PDF） - Vanguard International Semiconductor

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VG26S17405J-6

4,194,304 x 4 - Bit CMOS Dynamic RAM

Vanguard International Semiconductor  

VIS

VG26(V)(S)17405FJ

4,194,304 x 4 - Bit

CMOS Dynamic RAM

DC Characteristics ; 3.3 - Volt Version

(Ta = 0 to 70°C , VCC = + 3.3V (+10%,-5%), VSS = 0V)

Parameter

Symbol

Test Conditions

Operating current

Low

power

S-version

Standby

Current

Standard

power

version

RAS- only refresh current

EDO page mode current

ICC1 RAS cycling

CAS, cycling

tRC = min

ICC2 LVTTL interface

RAS, CAS = VIH

Dout = High-Z

CMOS interface

RAS, CAS ≥ VCC -0.2V

Dout = High-Z

LVTTL interface

RAS, CAS = VIH

Dout = High-Z

CMOS interface

RAS, CAS ≥ VCC -0.2V

Dout = High-Z

ICC3

RAS cycling, CAS = VIH

tRC = min

ICC4 tPC = min

VG26(V)(S)17405 Unit Notes

-5

-6

Min Max Min Max

- 120

- 110 mA 1, 2

- 0.5

- 0.5 mA

- 0.15

- 0.15 mA

-

2

-

2 mA

- 0.5

- 0.5 mA

- 120

- 90

- 110 mA 1, 2

- 80 mA 1, 3

CAS- before- RAS refresh

current

Self- refresh current

(S-Version)

CAS- before- RAS long

refresh current

(S-Version)

ICC5

ICC8

tRC = min

RAS, CAS cycling

tRASS ≥ 100µs

ICC9

Standby: VCC- 0.2V ≤ RAS

CAS before RAS refresh:

2048 cycles / 128ms

RAS, CAS: 0V ≤ VIL ≤ 0.2V

VCC- 0.2V ≤ VIH ≤ VIH (max)

Dout = High-Z, tRAS ≤ 300ns

- 120

- 250

- 300

- 110 mA 1, 2

- 250 µA

- 300 µA

Document:1G5-0162

Rev.1

Page 8

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