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FAN5631(2006) 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
生产厂家
FAN5631
(Rev.:2006)
Fairchild
Fairchild Semiconductor Fairchild
FAN5631 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Switch Configuration
VIN
S1
C+
S2
C
B
VOUT
S3
C-
S4
C
OUT
VIN
S1
C+
S2
VOUT
CB
S3
C-
S4
C
OUT
GND
This configuration shows the switches in the charging
phase position. For the pumping phase, reverse all
switch positions.
Figure 5. Mode 2:1 Configuration
GND
This configuration shows the S1 and S2 swithces in phase 1 position.
For phase 2, reverse the positions of the S1 and S2 switches.
The S3 switch is always OFF, and the S4 switch is always ON.
Figure 6. Mode 1:1 Configuration
control the rate of the output voltage ramp-up to its final value.
Typical start-up time is 1ms. Since the rate of the output voltage
ramp-up is controlled by an internally generated slow ramp,
pulse-skipping occurs and in-rush current is automatically lim-
ited.
Shutdown, UVLO, Short Circuit Current Limit
and Thermal Shutdown
The device has an active-low shutdown pin to decrease supply
current to less than 1µA. In shutdown mode, the supply is dis-
connected from the output. UVLO triggers when supply voltage
drops below 2V. When the output voltage is lower than 150mV, a
short circuit protection is triggered. In this mode 15 out of 16
pulses during the switching will be skipped and the supply cur-
rent is limited. Thermal shutdown triggers at 150ºC.
Efficiency Optimizer (FAN5632)
For higher efficiency in the FAN5632, VSEL should be tied to
ground to enable the efficiency optimizer feature. To achieve an
optimized efficiency, the switch mode configuration transition
point is shifted from a 2:1 to a 1:1 mode until the output voltage
falls to 20% of its nominal value. For example, when the nominal
output voltage is 1.5V, the output voltage is allowed to drop to
1.2V. This will maintain a peak efficiency of 85% for the input
voltage range of 2.9V to 3.5V. For normal operation, VSEL
should be tied high.
Applications Information
The FAN5631/FAN5632 requires one ceramic bucket capacitor
in the 0.1µF to 1µF range; one 10µF output bypass capacitor
and one 10µF input bypass capacitor. To obtain optimum output
ripple and noise performance, use of low ESR (<0.05) ceramic
input and output bypass capacitors is recommended. The X5R-
and X7R-rated capacitors provide adequate performance over
the -40°C to 85°C temperature range.
The bucket capacitor’s value is dependent on load current
requirements. A 1µF bucket capacitor will work well in all appli-
cations at all load currents, while a 0.1µF capacitor will support
most applications under 100mA of load current. The choice of
bucket capacitor values should be verified in the actual applica-
tion at the lowest input voltage and highest load current. A 30%
margin of safety is recommended in order to account for the tol-
erance of the bucket capacitor and the variations in the on-resis-
tance of the internal switches.
One of the key benefits of the ScalarPump™ architecture is that
the dynamically scaled on-resistance of the switches effectively
reduces the peak current in the bucket capacitor and therefore
input and output ripple currents are also reduced. Nevertheless,
due to the ESR of the input and output bypass capacitors, these
current spikes generate voltage spikes at the input and output
pins. However, these ESR spikes can be easily filtered because
their frequencies lie at up to 12 times the clock frequencies. In
8
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com

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