LP62S4096E-T 查看數據表（PDF） - AMIC Technology
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LP62S4096E-T Datasheet PDF : 12 Pages
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Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
CIN*
CI/O*
Parameter
Input Capacitance
Input/Output Capacitance
Min.
* These parameters are sampled and not 100% tested.
Max.
6
8
LP62S4096E-T Series
Unit
pF
pF
Conditions
VIN = 0V
VI/O = 0V
AC Characteristics (TA = -25°C to + 85°C, VCC = 2.7V to 3.6V)
Symbol
Parameter
Read Cycle
tRC
tAA
tACE1, tACE2
tOE
tCLZ1, tCLZ2
tOLZ
tCHZ1, tCHZ2
tOHZ
tOH
White Cycle
tWC
tCW1
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
LP62S4096E-55LLT LP62S4096E-70LLT
Unit
Min.
Max.
Min.
Max.
55
-
70
-
ns
-
55
-
70
ns
-
55
-
70
ns
-
30
35
ns
10
-
10
-
ns
5
-
5
-
ns
0
20
0
25
ns
0
20
0
25
ns
5
-
5
-
ns
55
-
70
-
ns
50
-
60
-
ns
0
-
0
-
ns
50
-
60
-
ns
40
-
50
-
ns
0
-
0
-
ns
0
25
0
25
ns
25
-
30
-
ns
0
-
0
-
ns
5
-
5
-
ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
(May, 2010, Version 3.3)
4
AMIC Technology, Corp.
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