LP62S4096EU-70LLI 查看數據表（PDF） - AMIC Technology
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LP62S4096EU-70LLI Datasheet PDF : 13 Pages
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LP62S4096E-I Series
Truth Table
Mode
CE1
CE2
OE
WE
I/O Operation
Standby
H
X
X
X
High Z
Standby
X
L
X
X
High Z
Output Disable
L
H
H
H
High Z
Read
L
H
L
H
DOUT
Write
L
H
X
L
DIN
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
CIN*
Input Capacitance
6
pF
CI/O*
Input/Output Capacitance
8
pF
* These parameters are sampled and not 100% tested.
Supply Current
ISB, ISB1
ISB, ISB1
ICC, ICC1, ICC2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
Conditions
VIN = 0V
VI/O = 0V
AC Characteristics (TA = -40°C to + 85°C, VCC = 2.7V to 3.6V)
Symbol
Parameter
Read Cycle
tRC
Read Cycle Time
tAA
Address Access Time
tACE1, tACE2 Chip Enable Access Time
tOE
Output Enable to Output Valid
tCLZ1, tCLZ2 Chip Enable to Output in Low Z
tOLZ
Output Enable to Output in Low Z
tCHZ1, tCHZ2 Chip Disable to Output in High Z
tOHZ
Output Disable to Output in High Z
tOH
Output Hold from Address Change
LP62S4096E-55LLI LP62S4096E-70LLI
Min.
Max.
Min.
Max.
55
-
70
-
-
55
-
70
-
55
-
70
-
30
-
35
10
-
10
-
5
-
5
-
0
20
0
25
0
20
0
25
5
-
5
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
(May, 2010, Version 3.3)
4
AMIC Technology, Corp.
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