LP62S4096EU-70LLIF 查看數據表（PDF） - AMIC Technology
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LP62S4096EU-70LLIF Datasheet PDF : 13 Pages
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LP62S4096E-I Series
AC Characteristics (continued)
Symbol
Parameter
LP62S4096E-55LLI LP62S4096E-70LLI
Unit
Min.
Max.
Min.
Max.
Write Cycle
tWC
Write Cycle Time
55
-
70
-
ns
tCW1
Chip Enable to End of Write
50
-
60
-
ns
tAS
Address Setup Time
0
-
0
-
ns
tAW
Address Valid to End of Write
50
-
60
-
ns
tWP
Write Pulse Width
40
-
50
-
ns
tWR
Write Recovery Time
0
-
0
-
ns
tWHZ
Write to Output in High Z
0
25
0
25
ns
tDW
Data to Write Time Overlap
25
-
30
-
ns
tDH
Data Hold from Write Time
0
-
0
-
ns
tOW
Output Active from End of Write
5
-
5
-
ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
Timing Waveforms
Read Cycle 1(1)
Address
tRC
tAA
OE
CE1
tOE
tOH
tOLZ5
CE2
DOUT
tACE1 , tACE2
tCLZ1 , tCLZ2
tOHZ5
tCHZ1 , tCHZ2
(May, 2010, Version 3.3)
5
AMIC Technology, Corp.
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