ISL12008IB8Z 查看數據表（PDF） - Renesas Electronics

零件编号

产品描述 (功能)

生产厂家

ISL12008IB8Z

I2C Real Time Clock with Battery Backup

Renesas Electronics 

ISL12008 I2C Real Time Clock with Battery Backup

The I2C bus is deactivated in battery backup mode to provide

lower power. Aside from this, all RTC functions are operational

during battery backup mode. Except for SCL and SDA, all the

inputs and outputs of the ISL12008 are active during battery

backup mode unless disabled via the control register.

Power Failure Detection

The ISL12008 provides a Real Time Clock Failure Bit (RTCF,

address 0Bh) to detect total power failure. It allows users to

determine if the device has powered up after having lost all

power to the device (both VDD and VBAT).

Low Power Mode

The normal power switching of the ISL12008 is designed to

switch into battery backup mode only if the VDD power is lost.

This will ensure that the device can accept a wide range of

backup voltages from many types of sources while reliably

switching into backup mode. Another mode, called Low Power

Mode, is available to allow direct switching from VDD to VBAT

without requiring VDD to drop below VTRIP. Since the

additional monitoring of VDD vs VTRIP is no longer needed,

that circuitry is shut down and less power is used while

operating from VDD. Power savings are typically 600nA at VDD

= 5V. Low Power Mode is activated via the LPMODE bit

(address 08h, bit 5) in the control and status registers.

Low Power Mode is useful in systems where VDD is normally

higher than VBAT at all times. The device will switch from VDD

to VBAT when VDD drops below VBAT, with about 50mV of

hysteresis to prevent any switchback of VDD after switchover.

In a system with a VDD = 5V and backup lithium battery of

VBAT = 3V, Low Power Mode can be used. However, it is not

recommended to use Low Power Mode in a system with VDD =

3.3V ±10%, VBAT  3.0V, and when there is a finite I-R voltage

drop in the VDD line.

InterSeal™ and ReSeal™ Battery Saver

The ISL12008 has the InterSeal Battery Saver, which prevents

initial battery current drain before it is first used. For example,

battery-backed RTCs are commonly packaged on a board with

a battery connected. In order to preserve battery life, the

ISL12008 will not draw any power from the battery source until

after the device is first powered up from the VDD source.

Thereafter, the device will switchover to battery backup mode

whenever VDD power is lost.

The ISL12008 has the ReSeal function, which allows the

device to enter into the InterSeal Battery Saver mode after

manufacture testing for board functionality. To use the ReSeal

function, simply set RESEAL bit to “1” (address 0Bh) after the

testing is completed. It will enable the InterSeal Battery Saver

mode and prevents battery current drain before it is first used.

Real Time Clock Operation

The Real Time Clock (RTC) uses an external 32.768kHz

quartz crystal to maintain an accurate internal representation of

sub-second, second, minute, hour, day of week, date, month,

and year. The RTC has leap-year correction, and corrects for

months having fewer than 31 days. The RTC hours is in 24-

hour format only. When the ISL12008 powers up after the loss

of both VDD and VBAT, the RTC will not begin incrementing

until at least one byte is written to the RTC registers. The sub-

second register will increment after power up but it will not

casue the other RTC registers to incremnent until at least one

byte is written to the RTC registers.

Accuracy of the Real Time Clock

The accuracy of the Real Time Clock depends on the

frequency of the quartz crystal that is used as the time base for

the RTC. Since the resonant frequency of a crystal is

temperature dependent, the RTC performance will also be

dependent upon temperature. The frequency deviation of the

crystal is a function of the turnover temperature of the crystal

from the crystal’s nominal frequency. For example, a ~20ppm

frequency deviation translates into an accuracy of ~1 minute

per month. These parameters are available from the crystal

manufacturer. The ISL12008 provides on-chip crystal

compensation networks to adjust load capacitance to tune

oscillator frequency from -97.0695ppm to +206.139ppm. For

more detailed information. See “Application Section” on

page 16.

I2C Serial Interface

The ISL12008 has an I2C serial bus interface that provides

access to the control and status registers and the user SRAM.

The I2C serial interface is compatible with other industry I2C

serial bus protocols using a bidirectional data signal (SDA) and

a clock signal (SCL).

Oscillator Compensation

The ISL12008 provides the option of timing correction due to

temperature variation of the crystal oscillator for either

manufacturing calibration or active calibration. The total

possible compensation is typically -97.0695ppm to

+206.139ppm. Two compensation mechanisms that are

available are as follows:

1. An analog trimming (ATR) register that can be used to

adjust individual on-chip digital capacitors for oscillator

capacitance trimming. The individual digital capacitor is

selectable from a range of 4.5pF to 20.25pF (based upon

32.758kHz). This translates to a calculated compensation

of approximately -34ppm to +80ppm (see ATR description

on page 16).

2. A digital trimming register (DTR) that can be used to adjust

the timing counter by -63.0696ppm to +126.139ppm (see

DTR description on page 16).

FN6690 Rev 1.00

Sep 26, 2008

Page 8 of 19

Share Link: