HB5425161B 查看數據表（PDF） - Elpida Memory, Inc

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HB5425161B

256M SSTL_2 interface DDR SDRAM

Elpida Memory, Inc 

HM5425161B, HM5425801B, HM5425401B Series

• Programmable burst sequence

 Sequential

 Interleave

• Start addressing capability

 Even and Odd

• Programmable CAS latency: 2/2.5

• 8192 refresh cycles: 7.8 µs (64 ms/8192 cycles)

• 2 variations of refresh

 Auto refresh

 Self refresh

Ordering Information

Type No.

Frequency

HM5425161BTT-75A*1

HM5425161BTT-75B*2

HM5425161BTT-10*3

133 MHz

133 MHz

100 MHz

HM5425801BTT-75A*1

HM5425801BTT-75B*2

HM5425801BTT-10*3

133 MHz

133 MHz

100 MHz

HM5425401BTT-75A*1

HM5425401BTT-75B*2

HM5425401BTT-10*3

133 MHz

133 MHz

100 MHz

Notes: 1. 143 MHz operation at CAS latency = 2.5.

2. 100 MHz operation at CAS latency = 2.0.

3. 125 MHz operation at CAS latency = 2.5.

CAS latency

2.0

2.5

2.0

2.0

2.5

2.0

2.0

2.5

2.0

Package

400-mill 66-pin plastic

TSOP II

Data Sheet E0086H20

2

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