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HEF4555BP 查看數據表(PDF) - NXP Semiconductors.

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HEF4555BP
NXP
NXP Semiconductors. NXP
HEF4555BP Datasheet PDF : 13 Pages
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NXP Semiconductors
HEF4555B
1-of-4 decoder/demultiplexer
11. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 5; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula
tPHL
HIGH to LOW
nAn nYn;
5V
[1] 88 ns + (0.55 ns/pF)CL
propagation delay see Figure 4
10 V
34 ns + (0.23 ns/pF)CL
15 V
22 ns + (0.16 ns/pF)CL
nE nYn
5V
98 ns + (0.55 ns/pF)CL
10 V
39 ns + (0.23 ns/pF)CL
15 V
22 ns + (0.16 ns/pF CL
tPLH
LOW to HIGH
nAn nYn
5V
[1] 113 ns + (0.55 ns/pF)CL
propagation delay
10 V
44 ns + (0.23 ns/pF)CL
15 V
32 ns + (0.16 ns/pF)CL
nE nYn
5V
123 ns + (0.55 ns/pF)CL
10 V
44 ns + (0.23 ns/pF)CL
15 V
32 ns + (0.16 ns/pF)CL
tt
transition time
on nYn
5 V [1][2] 10 ns + (1.00 ns/pF)CL
10 V
9 ns + (0.42 ns/pF)CL
15 V
6 ns + (0.28 ns/pF)CL
Min Typ Max Unit
-
115 230 ns
-
45 90 ns
-
30 65 ns
-
125 250 ns
-
50 95 ns
-
30 65 ns
-
140 280 ns
-
55 105 ns
-
40 75 ns
-
150 295 ns
-
55 110 ns
-
40 75 ns
-
60 120 ns
-
30 60 ns
-
20 40 ns
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] Transition time tt is the same as the HIGH to LOW and LOW to HIGH transition times tTHL and tTLH.
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD
Typical formula for PD (W)
Where:
PD
dynamic power 5 V
PD = 4500 fi + (fo CL) VDD2
fi = input frequency in MHz,
dissipation
10 V
PD = 18800 fi + (fo CL) VDD2
fo = output frequency in MHz,
15 V
PD = 45700 fi + (fo CL) VDD2
CL = output load capacitance in pF,
VDD = supply voltage in V,
(fo CL) = sum of the outputs.
HEF4555B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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