HI-518 查看數據表（PDF） - Renesas Electronics
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HI-518 Datasheet PDF : 8 Pages
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HI-518
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V
Analog (VIN, VOUT) . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (VDD/LLS Pin = GND or Open)
VA0-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
VA2/SDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (VDD/LLS Pin = VDD)
VA0-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Operating Conditions
Temperature Ranges
HI-518-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-518-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W)
PDIP Package* . . . . . . . . . . . . . . . . . .
90
N/A
CERDIP Package. . . . . . . . . . . . . . . . .
70
18
Maximum Junction Temperature
Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175oC
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = 0.8V; VDD/LLS = GND
(Note 3), Unless Otherwise Specified
PARAMETER
DYNAMIC CHARACTERISTICS
Access Time, tA
TEST
CONDITIONS
Break-Before-Make Delay, tOPEN
Enable Delay (ON), tON(EN)
Enable Delay (OFF), tOFF(EN)
Settling Time
Charge Injection Error
Off Isolation
Channel Input Capacitance, CS(OFF)
Channel Output Capacitance, CD(OFF)
Digital Input Capacitance, CA
Input to Output Capacitance, CDS(OFF)
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, VAL (TTL)
Input High Threshold, VAH (TTL)
Input Low Threshold, VAL (CMOS)
Input High Threshold, VAH (CMOS)
Input Leakage Current, IAH (High)
Input Leakage Current, IAL (Low)
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, VIN
On Resistance, rON
To 0.1%
To 0.01%
Note 6
Note 7
Note 3
Note 3
Note 3
Note 3
Note 4
Note 5
Off Input Leakage Current, lS(OFF)
Off Output Leakage Current, ID(OFF)
On Channel Leakage Current, ID(ON)
POWER SUPPLY CHARACTERISTICS
Power Dissipation, PD
TEMP
-8
-5
(oC)
MIN
TYP MAX MIN
TYP MAX UNITS
25
-
130
175
-
130
175
ns
Full
-
-
225
-
-
225
ns
25
10
20
-
10
20
-
ns
25
-
120
175
120
175
ns
25
-
140
175
140
175
ns
25
-
250
-
-
250
-
ns
25
-
800
-
-
800
-
ns
25
-
-
25
-
-
25
mV
25
45
-
-
45
-
-
dB
25
-
-
5
-
-
5
pF
25
-
-
10
-
-
10
pF
25
-
-
5
-
-
5
pF
25
-
0.02
-
-
0.02
-
pF
Full
-
-
0.8
-
-
0.8
V
Full
2.4
-
-
2.4
-
-
V
Full
-
-
0.3VDD
-
-
0.3VDD
V
Full 0.7VDD
-
-
0.7VDD
-
-
V
Full
-
-
1
-
-
1
A
Full
-
-
20
-
-
20
A
Full
-14
-
+14
-15
-
+15
V
25
-
480
750
-
480
750
Full
-
-
1,000
-
-
1,000
25
-
0.01
-
-
0.01
-
nA
Full
-
-
50
-
-
50
nA
25
-
0.015
-
-
0.015
-
nA
Full
-
-
50
-
-
50
nA
25
-
0.015
-
-
0.015
-
nA
Full
-
-
50
-
-
50
nA
Full
-
-
450
-
-
540
mW
FN3147 Rev 4.00
January 23, 2006
Page 3 of 8
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