HI-518 查看數據表（PDF） - Renesas Electronics
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HI-518 Datasheet PDF : 8 Pages
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HI-518
Test Circuits and Waveforms VDD/LLS = GND, Unless Otherwise Specified (Continued)
+15V
3.5V
ADDRESS
DRIVE (VA)
0V
OUTPUT
S1 ON 50%
50% S8 ON
tOPEN
VA
50
2.4V
V+
A2 / SDS
IN 1
IN 2-7
A1
IN 8
A0
OUTA
EN
OUTB
VDD/LLS V-
800
GND
-15V
FIGURE 6A. MEASUREMENT POINTS
FIGURE 6B. TEST CIRCUIT
FIGURE 6. BREAK-BEFORE-MAKE DELAY
+5V
VOUT
12.5pF
50%
3.5V
50%
ENABLE
DRIVE (VA) 0V
90%
OUTPUT
10%
0V
tON(EN)
tOFF(EN)
VA
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7. ENABLE DELAY
+15V
V+
A2 / SDS
IN 1
+10V
A1
IN 2-8
A0
EN
OUTA
50
VDD/LLS V-
800
GND
-15V
FIGURE 7B. TEST CIRCUIT
12.5pF
VA
VOUT
3V
0V
VO
2.4V
+15V
V+
A0, A1,
A2 / SDS
OUT
IN
A OR B
EN
VOUT
CL = 100pF
VA
GND VDD/LLS V-
FIGURE 8A. MEASUREMENT POINTS
VO is the measured voltage error due to charge injection. The error
in coulombs is Q = CL x VO.
FIGURE 8. CHARGE INJECTION
-15V
FIGURE 8B. TEST CIRCUIT
FN3147 Rev 4.00
January 23, 2006
Page 5 of 8
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