CXP5086 查看數據表（PDF） - Sony Semiconductor

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CXP5086

CMOS 4-bit Single Chip Microcomputer

Sony Semiconductor 

SC

SI

SOA

SOB

CXP5084/5086

tKCY

tKL

tKH

tSIK

tKSI

Input data

0.8VDD

0.2VDD

tKSOA

tKSOB

0.8VDD

0.2VDD

Output data

Fig. 4. Serial transfer timing

0.8VDD

0.2VDD

(3) Others

(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, VSS = 0V reference)

Item

External interruption high and

low level widths

Reset input low level width

Symbol

tI1H, tI1L

tI2H, tI2L

tRSL

Wake-up input high level width tWPH

Pin

INT1

INT2

RST

WP

Condition

Min. Max. Unit

During edge detection mode tsys + 0.05

µs

tsys + 0.05

µs

2tsys

µs

Stop mode

500

ns

Sleep mode

tsys + 0.05

µs

Note) In the standard version, tsys = 16/fc

In the high speed version, tsys = 8/fc

–9–

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