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MAX4359 查看數據表(PDF) - Maxim Integrated

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MAX4359 Datasheet PDF : 16 Pages
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Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Pin Description (continued)
MAX4359
SO
SSOP
PIN
MAX4360
SSOP
MAX4456
DIP
PLCC
23
26
16
27
27
24
27
17, 19, 21,
23
28, 31, 33,
35
28, 31, 33,
35
25, 27, 29,
31, 33, 35,
37, 39
28, 30, 32,
35, 37, 39,
41, 43
18
29
15, 29 28, 30, 32 31, 33, 36
20
32
32
36
40
22
34
34
38
42
24
36
13, 36 16, 26, 40 18, 29, 44
NAME
CE
CE
OUT_
AGND
D3
D2
V+
FUNCTION
Active-Low Chip Enable. WR is enabled when
CE = GND and CE = VCC. WR is disabled when
CE = VCC and CE = GND.
Active-High Chip Enable. WR is enabled when
CE = GND and CE = VCC. WR is disabled when
CE = VCC and CE = GND.
Buffer Outputs. Buffer inputs are internally grounded with
a 1000 or 1001 command from the D3–D0 lines.
Analog Ground. AGND must be at 0.0V, since the gain-
setting resistors of the buffers are connected to these
pins.
Parallel Data Bit when SER/PAR = GND. When
D3 = GND, D0–D2 specify the input channel to be con-
nected to specified buffer. When D3 = VCC, D0–D2
specify control codes. D3 is not used in serial mode
(SER/PAR = VCC).
Parallel Data Bit D2 when SER/PAR = GND. Not used
when SER/PAR = VCC.
Positive Supply. All V+ pins must be connected to each
other and bypassed to AGND separately (Figure 2).
_______________________________________________________________________________________ 5

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