W83977ATF-AW 查看數據表（PDF） - Winbond

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W83977ATF-AW

WINBOND I/O

Winbond 

W83977ATF/W83977ATG

Table of Contents-

1. GENERAL DESCRIPTION .............................................................................................................. 1

2. FEATURES...................................................................................................................................... 2

3. PIN CONFIGURATION.................................................................................................................... 5

4. PIN DESCRIPTION ......................................................................................................................... 6

4.1 Host Interface ........................................................................................................................ 6

4.2 General Purpose I/O Port...................................................................................................... 9

4.3 Serial Port Interface............................................................................................................. 10

4.4 Infrared Interface ................................................................................................................. 11

4.5 Multi-Mode Parallel Port ...................................................................................................... 11

4.6 FDC Interface ...................................................................................................................... 15

4.7 KBC Interface ...................................................................................................................... 17

4.8 POWER PINS...................................................................................................................... 17

4.9 ACPI Interface ..................................................................................................................... 17

5. FDC FUNCTIONAL DESCRIPTION.............................................................................................. 18

5.1 W83977ATF/ATG FDC ....................................................................................................... 18

5.1.1 AT interface ..........................................................................................................................18

5.1.2 FIFO (Data) ..........................................................................................................................18

5.1.3 Data Separator .....................................................................................................................19

5.1.4 Write Precompensation ........................................................................................................19

5.1.5 Perpendicular Recording Mode ............................................................................................19

5.1.6 FDC Core .............................................................................................................................20

5.1.7 FDC Commands...................................................................................................................20

5.2 Register Descriptions .......................................................................................................... 29

5.2.1 Status Register A (SA Register) (Read base address + 0)...................................................29

5.2.2 Status Register B (SB Register) (Read base address + 1)...................................................31

5.2.3 Digital Output Register (DO Register) (Write base address + 2) ..........................................33

5.2.4 Tape Drive Register (TD Register) (Read base address + 3)...............................................33

5.2.5 Main Status Register (MS Register) (Read base address + 4).............................................34

5.2.6 Data Rate Register (DR Register) (Write base address + 4) ................................................34

5.2.7 FIFO Register (R/W base address + 5) ................................................................................36

5.2.8 Digital Input Register (DI Register) (Read base address + 7)...............................................38

5.2.9 Configuration Control Register (CC Register) (Write base address + 7) ..............................39

6. UART PORT .................................................................................................................................. 41

6.1 Universal Asynchronous Receiver/Transmitter (UART A, UART B)................................... 41

6.2 Register Address................................................................................................................. 41

6.2.1 UART Control Register (UCR) (Read/Write) ........................................................................41

6.2.2 UART Status Register (USR) (Read/Write) ..........................................................................43

6.2.3 Handshake Control Register (HCR) (Read/Write) ................................................................44

6.2.4 Handshake Status Register (HSR) (Read/Write)..................................................................45

6.2.5 UART FIFO Control Register (UFR) (Write only)..................................................................46

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