W83977ATF-AW 查看數據表（PDF） - Winbond
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W83977ATF-AW Datasheet PDF : 198 Pages
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W83977ATF/W83977ATG
12.3.13 General Purpose Event 0 Status Register 1 (GP0STS1) ...................................................122
12.3.14 General Purpose Event 0 Status Register 2 (GP0STS2) ...................................................122
12.3.15 General Purpose Event 0 Enable Register 1 (GP0EN1) ....................................................123
12.3.16 General Purpose Event 0 Enable Register 2 (GP0EN2) ....................................................124
12.3.17 General Purpose Event 1 Status Register 1 (GP1STS1) ...................................................124
12.3.18 General Purpose Event 1 Status Register 2 (GP1STS2) ...................................................125
12.3.19 General Purpose Event 1 Enable Register 1 (GP1EN1) ....................................................125
12.3.20 General Purpose Event 1 Enable Register 2 (GP1EN2) ....................................................126
12.3.21 Bit Map Configuration Registers .........................................................................................127
13. SERIAL IRQ................................................................................................................................. 128
13.1 Start Frame........................................................................................................................ 129
13.2 IRQ/Data Frame ................................................................................................................ 129
13.3 Stop Frame........................................................................................................................ 130
13.4 Reset and Initialization ...................................................................................................... 130
14. CONFIGURATION REGISTER ................................................................................................... 131
14.1 Chip (Global) Control Register .......................................................................................... 131
14.2 Logical Device 0 (FDC) ..................................................................................................... 136
14.3 Logical Device 1 (Parallel Port) ......................................................................................... 140
14.4 Logical Device 2 (UART A)¢) ............................................................................................ 141
14.5 Logical Device 3 (UART B) ............................................................................................... 141
14.6 Logical Device 5 (KBC) ..................................................................................................... 142
14.7 Logical Device 6 (IR) ......................................................................................................... 143
14.8 Logical Device 7 (GP I/O Port I) ........................................................................................ 144
14.9 Logical Device 8 (GP I/O Port II) ....................................................................................... 148
14.10 Logical Device 9 (GP I/O Port III) ...................................................................................... 152
14.11 Logical Device A (ACPI).................................................................................................... 155
15. SPECIFICATIONS....................................................................................................................... 162
15.1 Absolute Maximum Ratings............................................................................................... 162
15.2 DC CHARACTERISTICS .................................................................................................. 162
15.3 AC Characteristics............................................................................................................. 166
15.3.1 FDC: Data rate = 1 MB, 500 KB, 300 KB, 250 KB/sec. ......................................................166
15.3.2 UART/Parallel Port .............................................................................................................167
15.3.3 Parallel Port Mode Parameters...........................................................................................168
15.3.4 EPP Data or Address Read Cycle Timing Parameters.......................................................168
15.3.5 EPP Data or Address Write Cycle Timing Parameters .......................................................169
15.3.6 Parallel Port FIFO Timing Parameters................................................................................170
15.3.7 ECP Parallel Port Forward Timing Parameters ..................................................................170
15.3.8 ECP Parallel Port Reverse Timing Parameters ..................................................................170
15.3.9 KBC Timing Parameters.....................................................................................................171
15.3.10 GPIO Timing Parameters ...................................................................................................172
16. TIMING WAVEFORMS................................................................................................................ 173
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