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M34C02-R 查看數據表(PDF) - STMicroelectronics

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M34C02-R Datasheet PDF : 30 Pages
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M34C02-R
Signal description
2.5
VSS ground
VSS is the reference for the VCC supply voltage.
2.6
Supply voltage (VCC)
2.6.1
Operating supply voltage VCC
Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage
within the specified [VCC(min), VCC(max)] range must be applied (see Table 6). In order to
secure a stable DC supply voltage, it is recommended to decouple the VCC line with a
roduct(s)) 2.6.2
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolleettee PProduct(s 2.6.3
suitable capacitor (usually of the order of 10nF to 100nF) close to the VCC/VSS package
pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (tW).
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of VCC), the device will not respond to any
instruction until VCC has reached the Power On Reset threshold voltage (this threshold is
lower than the minimum VCC operating voltage defined in Table 6).
When VCC has passed the POR threshold, the device is reset and in the Standby Power
mode.
Power-down
At Power-down (where VCC decreases continuously), as soon as VCC drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
20
Maximum RP value versus bus parasitic capacitance (C) for an I²C bus
VCC
16
RP
RP
12
SDA
8
MASTER
C
fc = 100kHz
SCL
4
0
10
fc = 400kHz
100
C (pF)
1000
C
AI01665b
9/29

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