BS62UV256DCP10(2008) 查看數據表（PDF） - Brilliance Semiconductor

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BS62UV256DCP10
(Rev.:2008)

Ultra Low Power CMOS SRAM 32K X 8 bit

Brilliance Semiconductor 

„ Revision History

Revision No. History

2.4

Add Icc1 characteristic parameter

2.5

Change I-grade operation temperature range

- from –25OC to –40OC

2.6

Add speed grade

-10 for 100ns

Revised ICCSB1 sepc.

- from 0.2uA to 0.4uA for C-grade

- from 0.4uA to 0.7uA for I-grade

Revised ICCDR sepc.

- from 0.1uA to 0.4uA for C-grade

- from 0.2uA to 0.7uA for I-grade

2.7

Revised ICCSB1 at Vcc=2V sepc.

- from 0.7uA to 0.5uA for I-grade

- from 0.4uA to 0.3uA for C-grade

Revised ICCDR sepc.

- from 0.7uA to 0.4uA for I-grade

- from 0.4uA to 0.3uA for C-grade

Typical value of standby current is replaced by

maximum value in Featues and Description

section

Remove “-: Normal” (Leaded) PKG Material in

ordering information

BS62UV256

Draft Date

Jan. 13, 2006

May. 25, 2006

Sep. 10, 2006

Remark

Oct. 31, 2008

R0201-BS62UV256

10

Revision 2.7

Oct.

2008

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