BUK573-60A 查看數據表（PDF） - Philips Electronics

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BUK573-60A

PowerMOS transistor Logic level FET

Philips Electronics 

Philips Semiconductors

PowerMOS transistor

Logic level FET

Product Specification

BUK573-60A/B

GENERAL DESCRIPTION

N-channel enhancement mode

logic level field-effect power

transistor in a plastic full-pack

envelope.

The device is intended for use in

Switched Mode Power Supplies

(SMPS), motor control, welding,

DC/DC and AC/DC converters, and

in automotive and general purpose

switching applications.

QUICK REFERENCE DATA

SYMBOL PARAMETER

VDS

ID

Ptot

RDS(ON)

BUK573

Drain-source voltage

Drain current (DC)

Total power dissipation

Drain-source on-state

resistance;

VGS = 5 V

MAX.

-60A

60

13

25

0.085

MAX.

-60B

60

12

25

0.1

UNIT

V

A

W

Ω

PINNING - SOT186A

PIN

DESCRIPTION

1 gate

2 drain

3 source

case isolated

PIN CONFIGURATION

case

12 3

SYMBOL

d

g

s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

VDS

Drain-source voltage

-

-

VDGR

Drain-gate voltage

RGS = 20 kΩ

-

±VGS

Gate-source voltage

-

-

±VGSM

Non-repetitive gate-source voltage tp ≤ 50 µs

-

ID

Drain current (DC)

Ths = 25 ˚C

-

ID

Drain current (DC)

Ths = 100 ˚C

-

IDM

Drain current (pulse peak value) Ths = 25 ˚C

-

Ptot

Total power dissipation

Tstg

Storage temperature

Tj

Junction Temperature

Ths = 25 ˚C

-

-

- 55

-

-

THERMAL RESISTANCES

SYMBOL PARAMETER

Rth j-hs

Rth j-a

Thermal resistance junction to

heatsink

Thermal resistance junction to

ambient

CONDITIONS

With heatsink

compound

MIN.

-

-

MAX.

60

60

15

20

-60A

13

8.2

52

-60B

12

7.6

48

25

150

150

UNIT

V

V

V

V

A

A

A

W

˚C

˚C

TYP.

-

55

MAX.

5

-

UNIT

K/W

K/W

February 1994

1

Rev 1.100

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