LCX007CL 查看數據表（PDF） - Sony Semiconductor
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LCX007CL Datasheet PDF : 24 Pages
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2. Clock timing conditions
Item
Hst rise time
Hst fall time
HST
Hst data set-up time
HCK
Hst data hold time
Hckn∗3 rise time
Hckn∗3 fall time
Hck1 fall to Hck2 rise time
Hck1 rise to Hck2 fall time
Clr rise time
Clr fall time
CLR
Clr pulse width
Vck rise/fall to Clr fall time
Vst rise time
Vst fall time
VST
Vst data set-up time
Vst data hold time
Vck rise time
VCK
Vck fall time
Enb rise time
Enb fall time
ENB
Vck rise/fall to Enb rise time
Enb pulse width
Pcg rise time
Pcg fall time
PCG
Pcg fall to Pck rise/fall time
Pcg pulse width
∗3 Hckn means Hck1 and Hck2.
LCX007CL
(Ta = 25°C) (fHCKn = 7.5MHz, fVCK = 15.7kHz)
Symbol
trHst
tfHst
tdHst
thHst
trHckn
tfHckn
to1Hck
to2Hck
trClr
tfClr
twClr
tdClr
trVst
tfVst
tdVst
thVst
trVck
tfVck
trEnb
tfEnb
tdEnb
twEnb
trPcg
tfPcg
toVck
twPcg
Min.
—
—
20
–40
—
—
–15
–15
—
—
3000
–50
—
—
–25
5
—
—
—
—
350
3450
—
—
650
1150
Typ.
—
—
67
0
—
—
0
0
—
—
3100
0
—
—
15
15
—
—
—
—
400
3500
—
—
700
1200
Max. Unit
30
30
100
40
30
30
15
ns
15
100
100
3200
50
100
100
25
µs
25
100
100
100
100
450
ns
3550
20
20
750
1250
–6–
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