MIC59P50YN 查看數據表（PDF） - Micrel

零件编号

产品描述 (功能)

生产厂家

MIC59P50YN

8-Bit Parallel-Input Protected Latched Driver

Micrel 

Micrel, Inc.

Timing Diagram

MIC59P50

Timing Conditions

TA = +25°C; Logic levels are VDD and VSS; VDD = 5V.

A. Minimum data active time before strobe enabled (data set-up time)

B. Minimum data active time after strobe disabled (data hold time)

C. Minimum strobe pulse width

D. Typical time between strobe activation and output on-to-off transition

E. Typical time between strobe activation and output off-to-on transition

F. Minimum clear pulse width

G. Minimum data pulse width

50ns

50ns

125ns

500ns

500ns

300ns

225ns

July 29, 2015

6

Revision 2.0

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