CXD3526GG 查看數據表（PDF） - Sony Semiconductor

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CXD3526GG

Digital Signal Driver/Timing Generator

Sony Semiconductor 

CXD3526GG

Pin

No.

Symbol

37 VSS

38 ROUT9

39 ROUT8

40 ROUT7

41 VST

42 HD2

43 HD3

44 VDD2

45 PRG

46 ENB

47 PO1

48 PO2

49 DWN

50 RIN8

51 RIN6

52 RIN3

53 RIN1

54 GIN5

55 GIN1

56 BIN8

57 BIN5

58 BIN2

59 ROSD1

60 GOSD1

61 BOSD1

62 HDIN

63 CLKPOL

64 VSS

65 TEST5

66 XCLR2

67 TEST6

68 HSCL

69 RSDA

70 HSDA

71 VSS

72 BOUT2

73 BOUT6

Input pin

I/O

Description

processing for

open status

— GND

—

O Red data output

—

O Red data output

—

O Red data output

—

O Vertical display start timing pulse output

—

O Horizontal auxiliary pulse output 2

—

O Horizontal auxiliary pulse output 3

—

— I/O power supply

—

O 2-step precharge timing pulse output

—

O Gate enable pulse output

—

O Parallel output 1

—

O Parallel output 2

—

I/O Vertical scan direction switching signal I/O

—

I Red data input

—

I Red data input

—

I Red data input

—

I Red data input

—

I Green data input

—

I Green data input

—

I Blue data input

—

I Blue data input

—

I Blue data input

—

I OSD red data input

—

I OSD green data input

—

I OSD blue data input

—

I Horizontal sync signal input

—

I Internal clock polarity selection (High: inverted; Low: non-inverted)

L

— GND

—

— Test pin (Connect to VDD2.)

—

I External clear (Low: reset)

H

— Test pin (Connect to GND.)

—

I Serial bus clock (host I/F)

—

I/O Serial bus data I/O (external ROM I/F)

—

I/O Serial bus data I/O (host I/F)

—

— GND

—

O Blue data output

—

O Blue data output

—

–5–

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