CXD3526GG 查看數據表（PDF） - Sony Semiconductor

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CXD3526GG

Digital Signal Driver/Timing Generator

Sony Semiconductor 

CXD3526GG

Electrical Characteristics

DC Characteristics

(Topr = –20 to +75°C, VSS = 0V)

Item

Symbol

Applicable pins

Supply

VDD1

—

voltage

VDD2

—

Input

voltage 1

VIH1

∗1

VIL1

Input

voltage 2

Input

voltage 3

VIH2

VIL2

VC∗2

VIH3

VIL3

HDIN, VDIN, HSCL

CLKP, CLKN

Output

voltage

VOH

All output pins

VOL

Power

consumption

PD∗3

—

Conditions

—

—

CMOS input cell

CMOS Schmitt

trigger input cell

Small-amplitude

differential input

—

—

Min.

Typ.

Max. Unit

2.3

2.5

2.7

3.0

3.3

3.6

2.0

— VDD2 + 0.3

–0.3

—

0.8

0.8VDD2

— VDD2 + 0.3

–0.3

—

0.2VDD2 V

1.718

2.0

2.281

1.868 VC + 0.4 VDD2

VSS VC – 0.4 2.131

VDD2 – 0.2 —

VDD2

VSS

—

0.2

CLKP = 85MHz

—

950

1140 mW

∗1 Input pins other than those indicated in items Input voltage 2 and Input voltage 3.

∗2 VIH3 > VC (max.) and VIL3 < VC (min.).

∗3 Tj [°C] ≥ Toprmax [°C] + θja [°C/W] × PD [W].

AC Characteristics

(Topr = –20 to +75°C, VDD1 = 2.5 ± 0.2V, VDD2 = 3.3 ± 0.3V, VSS = 0V)

Item

Clock input period

Symbol

—

Applicable pins

CLKP, CLKN, CLKC

Conditions Min. Typ. Max. Unit

—

10.0 —

—

Input setup time

tis

Input hold time

tih

RGB input, OSD input,

—

HDIN, VDIN

—

2.0

—

—

2.0

—

—

Input setup time

tis

Input hold time

tih

HSCL, HSDA, RSDA

—

5.0

—

—

—

5.0

—

— ns

Output rise/fall

delay time

tor/tof

∗4

CL = 20pF 2.5 4.0 7.0

Output rise/fall

delay time

tor/tof

FRP, XFRP, SHST,

CLKOUT

CL = 50pF 2.5 4.0 7.0

Cross-point time

difference

∆t

HCK1, HCK2, DCK1,

DCK2

CL = 20pF –5.0 —

5.0

HCK1 duty

HCK2 duty

th/(th + tl)

tl/(th + tl)

HCK1

HCK2

CL = 20pF 48

50

52

%

CL = 20pF 48

50

52

Phase compensation

PLL operating

—

frequency

PLLDIV = L 55

— 100

—

MHz

PLLDIV = H 27.5 —

55

∗4 Output pins other than FRP, XFRP, SHST and CLKOUT.

–8–

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