CXD1961AQ 查看數據表（PDF） - Sony Semiconductor
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CXD1961AQ Datasheet PDF : 33 Pages
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CXD1961AQ
Electrical Characteristics
Description
Symbol rate
Crystal Frequency
DATA0 to 7 – BYTCLK falling edge
(Parallel output mode PBYCK = 0)
PKTCLK – BYTCLK falling edge
(Parallel output mode PBYCK = 0)
PKTERR – BYTCLK falling edge
(Parallel output mode PBYCK = 0)
DATA0 to 7 – BYTCLK rising edge
(Parallel output mode PBYCK = 1)
PKTCLK – BYTCLK rising edge
(Parallel output mode PBYCK = 1)
PKTERR – BYTCLK rising edge
(Parallel output mode PBYCK = 1)
Serial output mode cycle time
(Serial output mode)
DATA0 to 7 – BYTCLK hold time
(Serial output mode)
PKTCLK, PKTERR – BYTCLK setup time
(Serial output mode)
PKTCLK, PKTERR – BYTCLK hold time
(Serial output mode)
I2C bus Serial clock cycle time
I2C bus Data setup time
I2C bus Data hold time
Symbol
Rs
Fxtal
tDB0
(Ta = 0 to 75°C, VDD = 3.3V)
Min.
Typ.
Max. Unit
20
30 MSPS
32
MHz
75
ns
tPB0
75
ns
tEB0
75
ns
tDB1
75
ns
tPB1
75
ns
tEB1
75
ns
tSOC
16
ns
tDBH
12
ns
tPBS
6
ns
tEBH
10
FscI
tDSI
100
tDHI
0
ns
400 kHz
ns
ns
Timing Waveform
(1) Parallel output mode, PBYTCK = 0
tPB0
tEB0
tPB0
tEB0
PKTCLK
PKTERR
BYTCLK
DATA [0:7]
tDB0 tDB0
– 14 –
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