CXD3511AQ 查看數據表（PDF） - Sony Semiconductor

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CXD3511AQ

Digital Signal Driver/Timing Generator

Sony Semiconductor 

CXD3511AQ

Pin

No.

Symbol

38 CLKP

39 CLKN

40 VDD2

41 CLKSEL1

42 VDD1

43 VSS

44 CLKSEL2

45 PLLDIV

46 VSS

47 CLKOUT

48 VSS

49 B2OUT0

50 B2OUT1

51 B2OUT2

52 B2OUT3

53 B2OUT4

54 VDD2

55 VSS

56 B2OUT5

57 B2OUT6

58 B2OUT7

59 B2OUT8

60 B2OUT9

61 B1OUT0

62 B1OUT1

63 B1OUT2

64 B1OUT3

65 B1OUT4

66 VDD2

67 VSS

68 B1OUT5

69 B1OUT6

70 B1OUT7

71 B1OUT8

72 B1OUT9

73 G2OUT0

74 G2OUT1

Input pin

I/O

Description

processing for

open status

I Clock input (small-amplitude differential input, positive polarity)

—

I Clock input (small-amplitude differential input, negative polarity)

—

— I/O power supply

—

I Input clock selection. (High: CLKC, Low: CLKP, CLKN)

L

— Internal operation power supply

—

— GND

—

I

Internal clock path selection.

(High: no frequency division, Low: frequency division)

L

I Internal PLL setting. (High: 55MHz or less, Low: 55MHz or more)

L

— GND

—

O Internal clock output (inverted output)

—

— GND

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

— I/O power supply

—

— GND

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 2)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

— I/O power supply

—

— GND

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Blue data output (port 1)

—

O Green data output (port 2)

—

O Green data output (port 2)

—

–5–

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