GTL2003 查看數據表（PDF） - NXP Semiconductors.
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GTL2003 Datasheet PDF : 24 Pages
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NXP Semiconductors
GTL2003
8-bit bidirectional low voltage translator
8.2 Unidirectional down translation
For unidirectional clamping, higher voltage to lower voltage, the GREF input must be
connected to DREF and both pins pulled to the higher side VDD1 through a pull-up resistor
(typically 200 k). A filter capacitor on DREF is recommended. Pull-up resistors are
required if the chip set I/O are open-drain. The opposite side of the reference transistor
(SREF) is connected to the processor core supply voltage. When DREF is connected
through a 200 k resistor to a 3.3 V to 5.5 V VDD1 supply and SREF can be set between
0.8 V to (VDD1 1.5 V), without the need for pull-up resistors on the low voltage side. The
output of each Sn will have a maximum output voltage equal to SREF. It is recommended
that VDD1 be greater than 1.5 V for proper operation.
1.8 V
1.5 V
1.2 V
1.0 V
0.8 V
easy migration to lower voltage
as processor geometry shrinks
VCORE
CPU I/O
200 kΩ
GTL2003
GND
SREF
S1
S2
GREF
DREF
D1
D2
S8
D8
5V
VDD1
CHIPSET I/O
totem pole I/O
002aac061
Typical unidirectional HIGH-to-LOW voltage translation.
Fig 5. Unidirectional down translation to protect low voltage processor pins
8.3 Unidirectional up translation
For unidirectional up translation, lower voltage to higher voltage, the reference transistor
is connected the same as for a down translation. A pull-up resistor is required on the
higher voltage side (Dn or Sn) to get the full HIGH level, since the GTL-TVC device will
only pass the reference source (SREF) voltage as a HIGH when doing an up translation.
The driver on the lower voltage side only needs pull-up resistors if it is open-drain.
1.8 V
1.5 V
1.2 V
1.0 V
0.8 V
easy migration to lower voltage
as processor geometry shrinks
VCORE
CPU I/O
totem pole I/O
or open-drain
200 kΩ
GTL2003
GND
SREF
S1
S2
GREF
DREF
D1
D2
S8
D8
5V
VDD1
CHIPSET I/O
002aac062
Typical unidirectional LOW-to-HIGH voltage translation.
Fig 6. Unidirectional down translation to protect low voltage processor pins
GTL2003
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 July 2012
© NXP B.V. 2012. All rights reserved.
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