ILC7280AR3333X 查看數據表（PDF） - Fairchild Semiconductor
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ILC7280AR3333X Datasheet PDF : 9 Pages
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PRODUCT SPECIFICATION
ILC7280
Application Information
VIN A and B
These pins are connected internally through a galvanic
connection. For maximum power from each regulator, both
VINA and VINB must be connected externally to V+.
Enable/Shutdown
Forcing ENA and/or ENB to a voltage greater than 2V,
enables the regulator(s). These inputs are CMOS logic
compatible gates. If this feature is not required, connect
ENAand/or ENB to VIN. Note that VINA and VINB are
connected internally. To minimize the effect of imbalanced
current sharing and possible noise, both VINA and VINB
should also be connected externally.
Input Capacitor
A 1µF capacitor should be placed from VINA/B to GND if
there is more than 10 inches of wire between the input and
the ac filter capacitor or if a battery is used as the input.
Reference Bypass Capacitor
CNOISE (the reference voltage bypass capacitor) may be
connected to the internal VREF which is common to regula-
tor’s A and B.
For low noise applications use of 1nF CNOISE is recom-
mended. Value higher than 1nF will lead to minimum
improvement of output noise, but it will substantially
increase the start-up time. Lower value of CNOISE results in
faster start –up. If a slow or delayed start up time is desired,
a larger value of CNOISE is used. Conversely, faster start up
times or instant-on applications will require smaller values
of CNOISE or its omission with the pin left open. The trade-
off of noise to response time should be considered.
Output Capacitor
An output capacitor is required from VOUTA and VOUTB to
GND to prevent oscillation and minimize the effect of load
transient currents. The minimum size of the output capaci-
tor(s) is dependent on the usage of CNOISE and its value.
Without CNOISE, a minimum of 0.47µF is recommended.
For CNOISE = 1nF, a minimum of 2.2µF is recommended.
Larger values of output capacitance will slightly slow the
regulator’s response during power up. The ILC7280 remains
stable even with ESR values as low as 10mΩ.
If the system design calls for smaller load currents, lower
capacitance may be used. Below 10mA the capacitance may
be reduced to 0.33µF.
No-load Stability
The ILC7280 will remain stable and in regulation with no
load current. These are desirable performance features for
applications such as keep-alive modes in CMOS systems.
Split-Supply Operation
When using the ILC7280 in a system requiring that the load
be returned to the negative voltage source, the output(s) must
be diode clamped to inhibit significant voltage excursions
below ground. A simple external diode clamp to ground will
protect the device from damage.
Thermal Considerations
In order to minimize thermal resistance (θJA), the device
mounted on conventional FR4 PCB material should be
surrounded as much ground copper ground plane as
possible. In a worst case application with minimum trace
widths and no ground plane, the MSOP-8 package exhibits a
thermal resistance of 200 °C/W. The maximum allowable
power dissipation is calculated in the following examples.
Thermal Evaluation Examples
The maximum allowed package power dissipation is:
PD(max) =(TJmax–TA) / θJA, where TJmax is the maximum
junction temperature and TA is the ambient temperature.
For an ambient temperature of 50°C
PD(max) = (150°C - 50°C) / 200°C/W
PD(max) = 500mW
If the intent is to operate from a 4V power source with a
150mA load current from both outputs at a 50°C ambient
temperature, the expected power dissipation is found in the
following calculation:
PD (each regulator) = (VIN – VOUT) * IOUT + (VIN * IGND)
PD (each regulator) = (4V – 3V) * 150mA + (4V * 0.12mA)
PD (each regulator) = 150mW
PD (both regulators) = 2 * 150mW
PD (both regulators) = 300mW
In this example the total power dissipated is 300mW which
is below the 500mW maximum package consideration and
therefore safe to operate. It should be noted that it is not
always possible to operate both regulators at the maximum
output current.
REV. 1.0.5 6/3/02
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