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MC-4532CC726XF-A10 查看數據表(PDF) - Elpida Memory, Inc

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MC-4532CC726XF-A10 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
MC-4532CC726
Byte No.
Function Described
32 Command and address signal input
setup time
33 Command and address signal input
hold time
34 Data signal input setup time
35 Data signal input hold time
36-61
62 SPD revision
63 Checksum for bytes 0 - 62 -A80
-A10
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency
127 Intel specification /CAS
-A80
latency support
-A10
(2/2)
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
20H
0
0
1
0
0
0
0
0 2 ns
10H
0
0
0
1
0
0
0
0 1 ns
20H
0
0
1
0
0
0
0
0 2 ns
10H
0
0
0
1
0
0
0
0 1 ns
00H
0
0
0
0
0
0
0
0
12H
0
0
0
1
0
0
1
0 1.2
03H
0
0
0
0
0
0
1
1
69H
0
1
1
0
1
0
0
1
64H
0
1
1
0
0
1
0
0 100 MHz
FFH
1
1
1
1
1
1
1
1
FDH
1
1
1
1
1
1
0
1
Timing Chart
Refer to the µPD45128441, 45128841, 45128163 Data sheet (E0031N).
Data Sheet E0053N10
11

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