CXP971000 查看數據表（PDF） - Sony Semiconductor
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CXP971000 Datasheet PDF : 9 Pages
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Pin Assignment in Piggyback Mode (Top View) 100-pin QFP package
CXP971000
PB2/PPO02/A10
PB3/PPO03/A11
PB4/PPO04/A12
PB5/PPO05/A13
PB6/PPO06/A14
PB7/PPO07/A15
PC0/PPO08
PC1/PPO09
PC2/PPO10
PC3/PPO11
PC4/PPO12/XCS3
PC5/PPO13/XCS2
PC6/PPO14/XCS1
PC7/PPO15/XCS0
VSS
PD0/D0/KS12
PD1/D1/KS13
PD2/D2/KS14
PD3/D3/KS15
PD4/D4/KS16
PD5/D5/KS17
PD6/D6/KS18
PD7/D7/KS19
PE0/INT0
PE1/INT1
PE2/INT2
PE3/INT3
PE4/INT4
PE5/INT5
PE6/INT6
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
2
3
4
5
6
7
8
9
10
A10
11
A9
12
A8
13
A7
14
A6
15
A5
16
A4
17
A3
18
A2
19
A1
20
A0
21
Vss
22
23
24
25
26
27
28
29
30
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10 15
11 14
12 13
VDD
A23
A11
A22
A12
A21
D7
A20
D6
A19
D5
A18
D4
A17
D3
A16
D2
A15
D1
A14
D0
A13
Vss
Vss
25 48
26 47
27 46
28 45
29 44
30 43
31 42
32 41
33 40
34 39
35 38
36 37
80
79
78
77
76
75
74
73
72
VDD
71
CE
70
NC
69
D15 68
D14 67
D13 66
D12 65
D11 64
D10 63
D9
62
D8
61
Vss
60
59
58
57
56
55
54
53
52
51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PH0/SDA
PK6
PK5
PK4/ADTRG
PK3/ADTEN
PK2
PK1
PK0
AVDD
AVREF
AVSS
PJ7/AN11/KS11
PJ6/AN10/KS10
PJ5/AN9/KS9
PJ4/AN8/KS8
PJ3/AN7/KS7
PJ2/AN6/KS6
PJ1/AN5/KS5
PJ0/AN4/KS4
PI7/AN3/KS3
PI6/AN2/KS2
PI5/AN1/KS1
PI4/AN0/KS0
Vss
PI3/SCK2
PI2/SO2
PI1/SI2
PI0/SCS2
PG7/SCK0
PG6/SO0
Note) 1. NC (Pin 88) must be left open. However, use this pin for FLASH EEPROM
incorporated version.
2. Vss and AVss (Pins 15, 41, 57, 70 and 90) must be connected to GND.
3. VDD and AVDD (Pins 44, 72 and 89) must be connected to VDD.
–2–
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