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CXP971000 查看數據表(PDF) - Sony Semiconductor

零件编号
产品描述 (功能)
生产厂家
CXP971000
Sony
Sony Semiconductor Sony
CXP971000 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
CXP971000
Switching of Piggyback Mode and Evaluator Mode
Piggyback mode can be used by setting two LCC-type EPROM (for upper bytes, for lower byte) and connecting
to the connector of top of the chip.
Evaluator mode can be used by connecting in-circuit emulator CPU probe to the connector of top of the chip.
Piggyback mode
Pin 1 marking
For lower bytes For upper bytes
LCC-type PROM
Evaluator mode
0
1
EPROM adaptor
Chip
CPU probe
Chip
Notes on PK6 Usage
FLASH EEPROM incorporated PK6 is also used as flash mode setting function. Note the followings:
1. "H" is output to PK6 during a reset. That is driven at comparatively high impedance (approximately 150k),
and take care that VOH should not fall under 0.7VDD by the partial pressure with external circuit load
impedance.
2. When using software reset functions, PK6 may not rise enough during a reset. Switching PK6 to "H" output
prior to software reset execution or connecting pull-up resistor is recommended.
RST
Normal operation
PK6
Keep PK6 above 0.7 VDD during
this period.
Flash mode
Mask ROM and piggy/evaluation chip do not have flash mode setting function. Considering that EEPROM
incorporated type is used, above countermeasure should be performed.
7

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