NOIL2SM1300A 查看數據表（PDF） - ON Semiconductor
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NOIL2SM1300A Datasheet PDF : 44 Pages
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NOIL2SM1300A
Table 4. POWER SUPPLY RATINGS (Notes 1, 2 and 3)
Boldface limits apply for TJ = TMIN to TMAX, all other limits TJ = +30°C. Clock = 315 MHz
Symbol
Power Supply
Parameter
Condition
Min
Typ
Max Units
VRES_AB
(Note 4)
Antiblooming
Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
-10%
0.7
+10%
V
1
mA
Peak Current following
edge reset
Clock enabled, lux = 0
50
mA
Standby Current
Shutdown mode, lux = 0
1
mA
VRES_DS
Reset Dual
Slope Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
1.8
2.5 3.675 V
0.4
3
mA
Peak Current
Clock enabled, lux = 0
36
mA
VRES_TS
Reset Triple
Slope Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
1.8
2.2 3.675 V
0.3
2
mA
Peak Current
Clock enabled, lux = 0
14
mA
VMEM_L
Memory Element Operating Voltage
low level supply
Dynamic Current
Clock enabled, lux = 0
-5%
2.5
+5%
V
0.2
1
mA
Peak Current during FOT Clock enabled, lux = 0
62
mA
Peak Current during FOT Clock enabled, bright
30
mA
VMEM_H
Memory Element Operating Voltage
high level supply
Dynamic Current
Clock enabled, lux = 0
-5%
3.3
+5%
V
1
mA
Peak Current during FOT Clock enabled, lux = 0
45
mA
VPRECH
(Note 4)
Pre_charge Driv- Operating Voltage
er Supply
Dynamic Current
Clock enabled, lux = 0
-10%
0.7
+10%
V
0.3
3
mA
Peak Current during FOT Clock enabled, lux = 0
32
mA
Peak Current during FOT Clock enabled, lux = bright
25
mA
1. All parameters are characterized for DC conditions after thermal equilibrium is established.
2. The peak currents were measured without the load capacitor from the LDO (Low Dropout Regulator). The 100 nF capacitor bank was
connected to the pin in question.
3. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is
recommended that normal precautions be taken to avoid application of any voltages higher than the maximum rated voltages to this
high−impedance circuit.
4. The VRES_AB and VPRECH power supply should be designed to have a sourcing and sinking current capability for frame rates of
the order of 20k frames /sec.
Every module in the image sensor has its own power
supply and ground. The grounds can be combined
externally, but not all power supply inputs may be combined.
Some power supplies must be isolated to reduce electrical
crosstalk and improve shielding, dynamic range, and output
swing. Internal to the image sensor, the ground lines of each
module are kept separate to improve shielding and electrical
crosstalk between them.
The LUPA1300-2 contains circuitry to protect the inputs
against damage due to high static voltages or electric fields.
However, take normal precautions to avoid voltages higher
than the maximum rated voltages in this high impedance
circuit. Unused inputs must always be tied to an appropriate
logic level, for example, VDD or GND. All cap_xxx pins
must be connected to ground through a 100 nF capacitor.
The recommended combinations of supplies are:
• Analog group of +2.5 V supply: VSAMPLE, VRES_DS,
VMEM_L, VADC, Vpix, VANA, VBUF
• Digital Group of +2.5 V supply: VDIG, VLVDS
• Combine VPRECH and VRES_AB to one supply (Note 4)
Table 5. POWER DISSIPATION (Note 1)
Power supply specifications according to Table 4.
Symbol
Parameter
PowerSTDBY
Power
Standby Power
Average Power Dissipation
Condition
Blocks in standby with SPI upload
lux = 0, clock = 315 MHz, 500 fps
Typ
400
1350
Units
mW
mW
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