NX25P10 查看數據表（PDF） - NexFlash -> Winbond Electronics

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NX25P10

1M-BIT, 2M-BIT AND 4M-BIT Serial Flash Memory with 40MHz SPI

NexFlash -> Winbond Electronics 

1M / 2M / 4M-BIT SERIAL FLASH MEMORY with 40MHz SPI

NX25P10, NX25P20 AND NX25P40

Table of Contents

NX25P10, NX25P20 AND NX25P40

1M-BIT, 2M-BIT AND 4M-BIT Serial Flash Memory with 40MHz SPI ........................................................................... 1

FEATURES ..................................................................................................................................................................... 4

GENERAL DESCRIPTION ............................................................................................................................................. 4

8-Pin SOIC 150-mil (Package Code N) .......................................................................................................................... 4

Figure 1. NX25P10, NX25P20 and NX25P40 Block Diagram .................................................................................... 5

PIN DESCRIPTIONS ...................................................................................................................................................... 6

Package Types ......................................................................................................................................................... 6

Serial Data Input (DI) ................................................................................................................................................ 6

Serial Data Output (DO) ............................................................................................................................................ 6

Serial Clock (CLK) .................................................................................................................................................... 6

Chip Select (CS) ....................................................................................................................................................... 6

Hold (HOLD) ............................................................................................................................................................. 6

Write Protect (WP) .................................................................................................................................................... 6

Figure 2. NX25P10, NX25P20 and NX25P40 Pin Assignments, 8-pin SOIC (Package Code N) ................................ 6

Table 1. Pin Descriptions .......................................................................................................................................... 6

SPI OPERATION ............................................................................................................................................................ 7

SPI Modes ............................................................................................................................................................... 7

Hold Function ........................................................................................................................................................... 7

WRITE PROTECTION .................................................................................................................................................... 7

Write Protect Features .............................................................................................................................................. 7

STATUS REGISTER ....................................................................................................................................................... 8

BUSY ....................................................................................................................................................................... 8

Write Enable Latch (WEL) ......................................................................................................................................... 8

Figure 3. Status Register Bit Locations ..................................................................................................................... 8

Block Protect Bits (BP2, BP1, BP0) ......................................................................................................................... 8

Reserved Bits ........................................................................................................................................................... 8

Status Register Protect (SRP) .................................................................................................................................. 8

Table 2: Status Register Memory Protection ............................................................................................................. 9

INSTRUCTIONS ........................................................................................................................................................... 10

Table 3: Instruction Set ........................................................................................................................................... 10

Table 4: Manufacturer and Device Identification ...................................................................................................... 10

Write Enable (06h) .................................................................................................................................................... 11

Figure 4. Write Enable Instruction Sequence Diagram ............................................................................................. 11

Write Disable (04h) ................................................................................................................................................... 11

Figure 5. Write Disable Instruction Sequence Diagram ............................................................................................ 11

Read Status Register (05h) ...................................................................................................................................... 12

Figure 6. Read Status Register Instruction Sequence Diagram ............................................................................... 12

Write Status Register (01h) ...................................................................................................................................... 13

Figure 7. Write Status Register Instruction Sequence Diagram ............................................................................... 13

Read Data (03h) ........................................................................................................................................................ 14

Figure 8. Read Data Instruction Sequence Diagram ................................................................................................ 14

2

NexFlash Technologies, Inc.

PRELIMINARY MKP-0009 Rev 6 NXSF040I-0405

04/04/05 ©

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