PEB2047 查看數據表（PDF） - Siemens AG

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PEB2047

Memory Time Switch Large

Siemens AG 

1.2 Logic Symbol

PEB 2047

PEB 2047-16

µP Interface

AD (7 : 0)

ALE

WR

RD

CS

A0

A1

INT

PEB 2047

IN (15 : 0)

PCM Interface

OUT (7 : 0)

VDD VSS SP CLK

ITL03767

Figure 1

Functional Symbol

1.3 General Device Overview

The Siemens Memory Time Switch Large MTSL (PEB 2047) is an expansion of the MTSC

(PEB 2045) regarding capacity and/or functionality. It is a monolithic CMOS switching device

capable of connecting maximally 1024 PCM-input time-slots to 1024 output time-slots. A constant

frame delay of one frame can be selected for wideband applications (e.g. ISDN H-Channels),

whereas for example for voice channels a minimal frame delay is programmable. In order to

manage the problem of different line delays, eight of the PCM inputs can be used as frame

measurement inputs and eight different input offsets are allowed. Thus a frame wander can be

compensated by adjusting the input offset during operation. A special circuitry guarantees that no

bit error will occur, when reprogramming the input offsets.

The MTSL on-chip connection memory and data-memory are accessed via the 8-bit standard µP-

interface (Motorola or Intel type).

A built-in selftest mechanism – also activated by the µP – ensures proper device operation in the

system.

The PEB 2047 is fabricated using the advanced CMOS technology from Siemens and is mounted

in a P-LCC-44 package. Inputs and outputs are TTL-compatible.

Semiconductor Group

9

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