UPD16435AN-001-001 查看數據表（PDF） - NEC => Renesas Technology
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UPD16435AN-001-001 Datasheet PDF : 36 Pages
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µPD16435, 16435A
PIN DESCRIPTIONS
Pin Name
CS
Pin No.
255
RS
254
Input/Output
Input
Input
RD
253
Input (Schmitt)
WR
252
Input (Schmitt)
WS
251
Input
250
D0 to D7
to
Input/output
243
BUSY
240
Output
RESET
242
Input
SCR
241
Output
SYNC
239
Input/output
OSC1
235
–––
OSC2
234
OSC3
233
Input (Schmitt)
COM1 to
COM73
SEG1 to
SEG119
TEST1
TEST2
212 to 176
3 to 38
41 to 70
81 to 134
137 to 171
238
237
Output
Output
Output
Output Type
–––
–––
–––
–––
–––
CMOS 3-state
Nch open-drain
–––
CMOS
Nch open-drain
–––
–––
Description
Chip select signal
Register selection signal (specifies address register when “0”,
control register when “1”).
Read enable signal. Reads write address when scrolling.
Active edge is falling edge.
Write enable signal.
Active edge is falling edge.
Word length selection signal (4-bit input when “1”, 8-bit input
when “0”).
Transmit/receive data (3-state bidirectional)
Upper → D4 to D7
Lower → D0 to D3 (These pins should be set as unused in case
of 4-bit data).
In test mode, these pins are output pins.
In a 4-bit transfer, storage is performed in the upper (MSB) in
order from the data transferred first.
“0” indicates busy state.
“0” → Initialization of all internal registers and commands is
performed. Output is fixed at V1.
Signal is output to CPU on completion of one-character scroll.
Synchronization signal input/output pins for master/slave
operation.
µPD16435: Input the 4.19 MHz reference clock to the OSC1 pin
externally. Leave the OSC2 pin open. (Always outputs high
level.)
µPD16435A: This is the pin to which the 4.19 MHz crystal
resonator is connected. Input the external clock to OSC1 first.
2 Hz external clock input pin. Scaled by 2 internally to generate 1
Hz, used as blink synchronization signal.
Analog switch Common output signals
Analog switch Segment output signals
“1” → Test mode
–––
“0” or open → Normal operating mode
4
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